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I'm trying to develop by using CORDIC algorithm for implementing trigonometric functions, but I haven't it yet running.
What about your application? What are you planning to implement it? Are you using vhdl or high level tools?
Re: Corelation of images
https://www.altera.com/products/software/products/dsp/dsp-builder.html
Added after 1 minutes:
also try this
https://www.altera.com/support/ip/dsp/ips-dsp-builder.html
Re: Corelation of images
yes it is, Simulink to vhdl translation is not real, but I told you to use Altera DSP Builder under Simulink. This is a blockset provide by Altera in order to get Vhdl directly. There is an equivalence if you are using Xilinx devices
Re: Corelation of images
Yes it is exactly I'm talking of doing a simulink model and compile it in order to generate a vhdl block which can be imported from the FPGA tool of you FPGA vendor.
Re: Corelation of images
I do not know your timing requirements exactly. I did not mean Matlab, I did mean using Simulink. This is a high-level application to develop dsp interconecting blocks, not code.
The main advantage is simulation withouth hardware of your model. you can load both...
Has anyone tried to implement the Hough Transform (HT) for image processing using FPGA???
I've read it is possible by means of Cordic algorithm for its capability to implement trigonometrical functions
Any suggestion about????
Re: Corelation of images
I would recommend you to start using Simulink, and creating a high level model about the main properties of your project.
After you have to use the blocks provides from your FPGA vendor (Xilinx or Altera) in order to make your model suitable to FPGA configuration.
At...
altera provides an reference design to do video processing by using altera video/image processin suite. Deinterlacer, croma resampler, color space... it is very powerful
altera provides multiple ports in order to implement LVDS transceiver, you'll need to use a PLL and LVDS megafunction, it is very easy to configure by means mega wizard. Signal integrity is an issue because the high frecuency within this hi-speed lines.
I'm using Altera tools, I need speed and I want to do via hardware implementation not using NIOSII.
I've been using DSPBuilder from Simulink, but there isn't any block to do directly an histogram.
I would like to get any reference design such us ram implementation in order to migrate it to...
x-ctu+zigbee+atnd
I'm using a Xbee module working standalone in a simple board. Surprisingly I've detected too high current consumption in my board (53mAmps) even when Xbee are in Idle mode.
I think there are any wrong in this module.
Any idea to respect??
Thanks a lot in advance!!!
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