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Recent content by asicman

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    Real-Time Image Rotation

    Looking to do this in an FPGA: What methods have you guys used that achieved decent to good results?
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    Where do we stand on HDL vs ESL

    I was just curious to see how many engineers out there are switching from doing HDL based designs to designs utilizing ESL design methodologies such as SystemC or any of the other proprietary C/C++ to RTL design tools and what their thoughts on the transition are.
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    Implementing a large register file

    This can't be done with a RAM block since, the values written into the register need to be used by other blocks (i.e. multiple registers need to be read by multiple blocks at the same time), a RAM with a single or even a dual output for data would not cut it.
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    Implementing a large register file

    Hello, I am trying to find the best way to implement a very large register file (1030+ 16-bit registers). On the write side I am using s straight forward approach: process(CLK) if rising_edge(CLK) then if (RST = '1') then ...<RESET CODE> else if (ADDR = C_ADDR_REG0) then...
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    PLL Implementation in an FPGA

    Does anyone have documentation regarding how to implement a PLL in FPGA, for digital demodulation applications
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    Fundamentals of Statistical Signal Processing, Solutions

    solutions to statistical signal processing by kay I checked both sites and neither had the solutions manual, does anybody else have any ideas?
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    Fundamentals of Statistical Signal Processing, Solutions

    fundamentals of statistical signal processing Does anyone know where I can get the solutions manual for Fundamentals of Statistical Signal Processing by Kay?
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    Ubuntu 8.04 and Cadence

    libelf.so.1 cadence Hi Everyone, I just want to know if it is possible to install IC4141 on Ubuntu 8.04 without any hassle, and if not what needs to be done to make it work.
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    The Importance of knowing C-to-FPGA Tools

    the importance of knowing c Hi All, I was wondering what everyone thought about C-to-FPGA design tools. Is this something us junior FPGA engineers be learning? or is more niche (specific to DSP applications etc). I am familiar with SystemC and SystemVerilog for verification, but I really want...
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