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Recent content by Areky_qin

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    Best OS for Cadence IC5141 & IC610

    cadence ic610 download where could download centos4 or rhel4?
  2. A

    regulator noise - how to make the bandgap output stable?

    Re: regulator noise I am glad to you fix the power bus width. 1) the phase margin not effect the high frequence noise, if the phase margin is not large enough, the bandgap output would osc.., and if you worry about the power noise, you need run the PSRR, and addd coupling cap and filter...
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    how to do transistor sizing in cadence spectre

    transistor sizing you could use any value of W, L and m factor, and in fact you could use .scale option in hspice to shink you transitor size, for example, you use a PMOS as W=1000u, L=500u, m=100, at the same time you define .option scale=0.01, so you final Pmos size is w=10000*0.0001=100u...
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    regulator noise - how to make the bandgap output stable?

    regulator noise 1st, you have make sure the power bus is strong enough to supply large current loading, this could ensue the power of bandgap is higher enough for ouput the ideal value you wanted. 2nd, you need optimize your bandgap circuit, it coud work well with lower power. Added after 2...
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    0.5um CMOs and 0.6um CMOS

    only the minimum channel length is different, of course, use 0.5um process can product 0.6u channel length mos. Added after 44 seconds: the speed will be increase, and vt will decrease form 0.6um process to 0.5um process.
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    5V input with 3.3V MOS

    mosfet 3.3v use large Length transistors, and use stack structure.
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    How to do metal slot in Virtuoso, please?

    cadence virtuoso cut yeach, chop is a great way. select a metal, then ctrl + c.
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    caclulation of a R2R dac ladder

    r/2r dac equation could you re-upload a more clear pic? in generally, the r2r calculate is easy, please from the terminal close the vref,then one by one to the termal close the opamp.
  9. A

    Where to start Analog Design?.

    start from read book, then with simple case, just for bandgap circuit, opamp etal.
  10. A

    LVDS transciever interface with BGR

    if the POWER bus can be split, it is better, if can not, please use large bypass cap to isolate the power or gnd noise.
  11. A

    Plotting gm while sweeping the temperature

    I think you can get the value, nomally, I use the hspice run simulation, i use .probe lx7(device name), the the wave form will show the gm of the mosfets. I think the spectre should have the same feature. hope it it help for you, good luck.
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    Power circuitry design for battery operated device

    battery operated 3.3v supply your are right, for the internal vcc=3.3/1.8v, you can use a regulator or ldo to generate this supply. but for the +12, you have to use a boost circuit or charge pump. the +6v value, you can use a clamp circuit, the power could be +12v and the battery supply, when...
  13. A

    Iout, Iin's relationship of wilson current

    nomally, the (w/l)m3 : (w/L)m4=(w/l)m1 : (w/l)m2, then the Iin/Ioutp = (w/l)m3:(w/l)m4
  14. A

    can anyone explain this CMOS comparator circuit to me

    when clk='L', detect the value, and when clk='h', latch the value, why do as this, to increase the speed. Added after 35 seconds: it will be call as sense amplifier.
  15. A

    Question about LDO and Bandgap Reference help me if u can

    from your case, the loading math have some issues.

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