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MAX3232 TTL signal level depends on power supply voltage.
If power supply is 3.3V, logic output signals will be 0 - 3.3V. This is compatible with 5V logic families that accept 3.3V logic levels.
If power supply is 5V, logic output signals will be 0 - 5V.
It seems to accept 5V logic inputs when...
Witch Soft Start capacitor do you use? 100nF? That value affetcs to off-on time. For a 1,5nF the off-to-on time is about 300us. Check last plot in page 9.
When you measure the output of your transformer, you see the RMS voltage, that is equivalent to a peak voltage equal to Vp=1.41*Vrms. (sqr(2)=1.41)
12Vrms * 1.41 = 16.9Vp
16.9V minus the direct voltage of your rectifier will be near 16V.
Your circuit is working OK.
If you need 12Vdc, you can...
I use theese circuits to switch on/off power supply, and control signal is 3,3V from a processor.
Q6 controls a power supply lower than 3,3V.
Q5 and Q7 can control a power supply from 3,3V to the maximum Vds of Q7. Use the Q5 that meets your specifications.
I current is high, check Q6 and Q5...
vhdl bit vs std_logic
No.
Weak states are like a pull up or pull down resistor. A weak 0 maintains its value ina a multisource signal until another source puts a strong 1, for example.
I'm not sure, but I think that in real FPGA internal circuits, a weak level is not synthesizable...
Analyze this circuit.
I use it to conver a 0Vdc +-10Vac single ended signal to a 2,5Vdc +-2,5Vac one. After that, put an inverter or a differential amplifier to obtain the differential output.[/img]
Learn about WiMax.
It is similar to WiFi, but in theory allows 48km links at 70Mbps, and doesn't need direct sight.
I don't know about cost, and you'll need some intelligent devices.
You will need two serial to ethernet converters, an two WiMAX access points to establish the link.
I don't know much about your circuit, but I know that an OTA is a transconductance amplifier. It gives a current that depends on an input voltage (Iout=gm*Vin). This ideal behaviour is simulated using your E0(ggain).
The output voltage of an OTA depends on output load. If you use gm=100uA/V and...
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http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.23.646
http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.47.7637
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Added after 4 minutes:
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You have to giave an initial value for mid1.
For example:
signal mid1: std_logic := '0';
I'd better use a reset signal that really sets that initial value for mid1 into the process.
In real world, that would work, but if you don't give an initial value for mid1, ModelSim doesn't know where to...
Of course you can implement a DSP processor into an FPGA and make it work, but DSP processor on FPGA performance will be lower that the performance of a similar DSP chip.
DSP on FPGA is preferred when you have to do the same fixed process all the time. In that case you do not implement a DSP...
std_logic values
As vinodkumar said, BIT has 2 values: '0' and '1'.
STD_LOGIC has 9 values: 'U', 'X', '0', '1', 'Z', 'W', 'L' ,'H' and '-'.
I know the meaning of some of them:
U = unknown (*)
X = collision - a multisource line is driven '0' and '1' simultaneously (*)
0 = logic 0 (*)
1 = logic...
In opencores.org there are DSP implementations.
uBlaze is only a processor, but you can add to it real DSP capabilities connecting a DSP core to the faster LMB bus.
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