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Well, 4053 can be used to control M1/M2, but since it adds delay, to get balanced delay on each part of the switch, I also have to use it to add the same delay to M3/M4 parts.
So I need one 4053 for each switch, for a total of 98 parts.
Any other idea to decrease the number of parts?
The following pictures show the FDS8958A plots at 45 and 443 kHz drived by 74AC family. I believe that driving it by 74AHC family the ground bounce will be better.
Keep in mind that the max switching frequency I need is 192kHz. The rise of the waveform is still good at 443kHz.
Following your...
The issue is that I cannot reference the control of M1/M2 to their source because I use several shift registers to drive the total 98 switches, and each shift register drives 8 switches, so I have 1 reference for 8 switches, not 1 reference for 1 switch. I have to reference the control of M1/M2...
Ok, I had not seen that M1 and M2 are both NMOS, now is clear and works correctly in simulation.
Now the great problem is how to control M1/M2 gates. I have 49 of these switches per channel (first 5 MSB are thermometer decoded, the remaining 18 bit are R2R decoded) and a battery of shift...
In simulation, also referencing Ctrl0 to the source of M1/M2 when I try to switch to +5V (M4 gate to 0V, M3 gate to -5V) I get around 1V5 at the output.
Seems that M1/M2 never turn off.
Also if I tie M2 gate to +5V and M1 gate to -5V I get 1.86V at the output and 928 mV at M1/M2 source. In this...
My target is a 192kHz DAC, so the latch speed is around 5uS, while Turn-on rise time and Turn-off fall time of the FDS8958A is around 10nS, so I think there is enough room.
Thanks for the basic schematic.
I understand that I can control the PMOS M4 from +5V (OFF) to 0V (ON). I also can control...
With a regular R-2R DAC you have the MSB switching at zero crossing, regardless of the signal level. With a sign Magnitude DAC the MSB are not switching with lower level signals, that means lower THD and lower glitch at low level signal.
The sign magnitude DAC architecture basically is two...
Using logic IC such as the 595 (usually used in discrete DAC) I have the same problem of a real MOSFET, plus I have around 13 ohm rds-on that affects the ladder precision.
That's the reason I would use discrete MOSFET switches.
Basically I need a three input/one output switch like this
Or I...
Yes, the part is the FDS8958A.
It's a discrete switch for a DAC, so I need lower on resistance as possible, 100mOhm or less. Higher on resistance will affect the ladder network precision.
Since I'm using sign magnitude notation with a single ladder network, I need to switch between +V, -V and...
I need a tri state discrete MOSFET switch, to switch among +V, -V and GND.
I thought to use a couple of complementary mosfet pair as in the attached image.
In the first state 1) +5V the bottom pair is open (high impedance), while the P-Channel mosfet of the top pair is on, output is +5V.
In...
Rather than a Vackar it's a simplified Driscoll oscillator.
Anyway, for some reason, changing the oscillator circuit is not an option.
Any idea about a trap to suppress the unwanted mode?
I'm building an emitter coupled oscillator (schematic: OCXO_56448_II.jpg) using an SC-Cut 3rd overtone crystal at 5.6448 MHz that has the following specs:
ESR:100 ohm
C0:3.72pF
Cl:0.122fF
Q:2.3M
While a simple capacitor (C3 in the schematic) is able to suppress the unwanted B-mode oscillation...
I have the OCXO in the DAC but not in the source, so I could get rate mismatch in the long period. I should implement some kind of dynamic correction to avoid full or empty FIFO.
One way could be to realign the clock domains during the pause between the songs increasing or reducing the pause. In...
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