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Recent content by andhov

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    [SOLVED] Amplifier gain dependence of Common mode value

    I want to understand the reason of variation. Why it is possible???
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    [SOLVED] Amplifier gain dependence of Common mode value

    Hi Guys, I have simulated a sample diff amp/op amp and found a difference of DC gain for various CM(common mode) voltage. All transistor work in saturation region. If the variation is small(like a ±5dB) I will not concern and will think that is something technology dependence but it varies in...
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    Help with 2nd order filter design

    Hey Sink0, Could you say what is common mode(central voltage) of you input signal frequency. You may need to apply on V- a voltage equal to the common mode. Otherwise you will get DC voltage shift on output node. I think TI thought that input signal is bipolar(common mode is zero(GND)) and...
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    Power consumption and noise analysis for IC filter

    It consists of OP amp and R,C ...I got the idea of noise calculation...but maybe there are any references???
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    Power consumption and noise analysis for IC filter

    Basically I need it for low pass active filter....
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    Power consumption and noise analysis for IC filter

    Guys, I do need some fresh idea or useful reference how to compare several design of IC active filter in the order of power consumption or noise. Thanks in advance....
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    [SOLVED] DDC file Synopsys - what does it contain?

    phoenixpavan, You are mistaken....:shock::shock::shock: .ddc is not .db .....ddc is a file format which can be read by routing tool(for synopsys IC compiler) also....but it is file format which contains your design + design constraints. 10x..
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    [SOLVED] DDC file Synopsys - what does it contain?

    In general it is binary file which contains both verilog gate level description and design constrains.
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    [SOLVED] Layout of active device and passive device

    It depends on which kind a block do u designing...I just can guess that you are working on I/O blocks(you are talking about pads;-))..So YOU can't put any sensitive device under or near pads(e.g ESD blocks)...so in this case your advisor is right...
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    Design of pseudo-resitor

    I gonna use "pseudo-resistor" in filter design with low cut off frequency...for IC implementing...
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    Design of pseudo-resitor

    Hi Gangs, I need a solution to design a pseudo resistor. So I mean is there any solution about a design which is operate as resistor with 1teraohm resistance. Thanks...
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