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Recent content by alienx

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    Problem with the design please help

    is there anyone who could help me with at least Signal to noise ratio problem?
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    Problem with the design please help

    Hi, I need some suggestion from you guys.... I managed to build myself a 12 tap adaptive filter in Simulink for my adaptive noise cancellation system.... I choose the 12 tap filter arbitrary after experimenting with multiple designs (I started from a 2 tap filter and later moved on to 12 tap...
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    Simulink to Xilinx FPGA

    Hi, I am aware that there is a way by which you can interface FPGA with your simulink so that you can put your input in to the block and the input get processed by the FPGA and oupput result is shown on the Simulink graph. I have managed to make a 3 tap FIR filter in verilog. Now I would like...
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    PIn for LINEin, MIC, LINEout

    Hi Guys, I am working on my cyclone 2 FPGA and I am applying my Noise cancellation technique in to it. I need to connect 2 MIC and a headphone to my FPGA so I want to incorporate the LINEin, MIC and LINEout pins but I dont know whats there PIN assignments are... Could someone help me by telling...
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    HDL generation error from Simulink model

    Hi can someone suggest me any solution....
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    HDL generation error from Simulink model

    which table are you referring to mahdiksh....
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    HDL generation error from Simulink model

    hi here is the 7.2 file
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    [SOLVED] Adaptive filter code required

    I manage to design myself an Adaptive filter using simulink model but I have some errors....check this link https://www.edaboard.com/threads/187649/#post784641
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    HDL generation error from Simulink model

    Hi, I was able to make a Simulink model for my adaptive filter....but when I try to generate the vhdl code using HDL coder from the Tool menu, simulink gives me an error message... I have attached my simulink model along with the error message... please help!
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    [SOLVED] Adaptive filter code required

    Hi, Does anyone have the VHDL or verilog code for adaptive filter or does anyone have a Simulink model for Adaptive filter, I am experimenting with my altera cyclone 2 and would like to implement it on my FPGA, if anyone have the code/model with them than do share it with me please.... Also...
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    need an adaptive filter application with code

    hi ganesh_nit were you able to find the code for Adaptive filter if so do share please....
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    where is HDL SubSystem in DSP builder

    Thanks for trying farhada :) hopefully someone else might have the solution.... Could someone sent me the VHDL code for adaptive filter or point me to a Simulink model of an adaptive filter.....
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    where is HDL SubSystem in DSP builder

    @farhada there is no HDL subsystem block in DSP builder 9.0 library, I tried everything its not there,,, :(
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    where is HDL SubSystem in DSP builder

    any one....?? :(
  15. A

    where is HDL SubSystem in DSP builder

    Hi, I am new to DSP builder and FPGA programming. I was following DSP builder example which was on implementing FIR filter using DSP builder in Simulink and generating VHDL to be implement in my cyclone 2 FPGA. I came across this block as was given in the example steps which was "HDL SubSystem...
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