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Recent content by ahmed edris

  1. A

    Mosfet Level 1 model in cadence

    There is level one mosfet model in ahdl lib in cadence ''mos_level1'' I want to know if the equation for threshold voltage is correct in the model. It is given as if (vbs > 2*phi) begin vth = vto + gamma*sqrt(2*phi); end else begin vth = vto - gamma*(sqrt(2*phi - vbs)...
  2. A

    Post CMOS process etching

    I am working on a design of TEG (thermo electric generator) using cmos process. layout is conducted using cadence but the design needs so called post cmos process etching to create cavity in the substrate. how this information can be delivered to the fab as it would not be included in GDS file.

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