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Hello,
Please, I need help about how could I use FIFO in my custom IP core?
I want to store many data in write fifo and read fifo, but how could i store data in write fifo ( in user_logic.vhdl)
If there are any tutorial explain how to store many data in FIFO in vhdl , Plz I need it so much ...
Hello,
I need info about the
1- How did the VFBC work ?(Please,If anyone have pdf or link about this subject, send it to me :arrow: adam_lo@ymail.com )
2- what is the benefit of the stride ? and what is mean ?
I have spartan 3a 3400 and in the demo that came with it there is a VFBC core .
and...
Hello,
Please, I need help so much.
I don't now why when I add my custom ip core .this error appeared.
what this error mean?
and how to solve it ?
Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------...
Thanks TrickyDicky for your reply
Yes,
When I read the register the value printed correct
Are you mean that?
res=MYIP_mReadSlaveReg0(XPAR_MYIP_0_BASEADDR,0);
xil_printf("%d",res);
yes of course,
in c code
MYIP_mWriteSlaveReg0(XPAR_MYIP_0_BASEADDR,0,12);
MYIP_mWriteSlaveReg1(XPAR_MYIP_0_BASEADDR,1,3);
res=MYIP_mReadSlaveReg2(XPAR_MYIP_0_BASEADDR,2);
xil_printf("%d",res);
Hello
I create in XPS program Custom ip that add two number and It work correct and the result appeared in hyper terminal .
But when replace add to multiplier two no. the result in hyper terminal always be zero ?
This code I add after beginning in arch. in user logic
mult : process...
Hi,
I wanted to create IPCore to add two fixed point .
I added fixed_pkg file to pcores\add_fix_v1_00_a\hdl\vhdl .
first I wrote in entity :
port(
reg_out : out sfixed(29 downto -2);
.
.);
and in architecture I wrote process
fix: process(slv_reg0,slv_reg1)
variable reg0,reg1,reg2 : (29...
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