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Recent content by aaronkong

  1. A

    What kind of ASIC designer is better off, frontend or backend?

    Re: Frontend vs. Backend There're too many FE guys which no too many BE guys. The tools wont as intellegent as man.
  2. A

    Full custom design & transistor modeling

    stap is the sub
  3. A

    which input has faster response for output rising edge????

    A pin is the fast pin
  4. A

    What are standard cell tracks ?

    12 track standard cell tracks mean routing resources
  5. A

    Can I ignore DRC error: metal1 density?

    DRC--------urgent 1. some foundry can ignore this, while others not, ask your foundry. 2. what is active contact?
  6. A

    BUFFERS VS CLOCK BUFFERS

    The rise & fall time is almost the same of the CLKBUF, it can min the skew for CTS.
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