Xilinx xc9572xl instead of Altera epm7064

[ulaska]

Hello, i have some problems.

in a microcontroller circuit, we use CPLD between the CPU bus and I/O Device bus.

we use reference design circuit, and we use xilinx xc9572xl-10 , instead of altera epm7064 - 7..
but our xilinx doesnt work, it works but not all functions..

can be any problem with the Time issue, cause altera is 7ns, our xilinx is 10 ns.
does it matter a lot?
we dont use any global clocks GCK or etc..

our inputs are IORD# IOWR# OE# WR# ... from CPU..

the problem is not very clearly, sorry, if you want i can attach the PLD circuit.

thank you.

 

[echo47]

Xilinx xc9572xl instead of @ltera epm7064

What is the problem?

If your output bits are inverted, then see this bug report:
**broken link removed**

 

[ulaska]

Xilinx xc9572xl instead of @ltera epm7064

ok i forget to explain that i use ISE 7.1i + sp4
i dont think there is a bug.


we use CPLD between the CPU bus and I/O Device bus.
the problem is: we can see the data bits in the CPU bus line, but we cannot see the necessary data bits in the I/O device data bus (afterwards CPLD)