Xilinx XC95144 burning up

[TenmaNeko]

I've been tasked with finding out why a PCB in our lab stops working occasionally.

After talking to the techs, it seems the CPLD used (XC95144-15PQG100C) is burning up. Swapping it out fixes the board, temporarily. The bad CPLD's are checked and power and ground are shorted together internally.

It sounds as if it's getting a current spike somehow that's frying it.

There only 7 inputs, 5VDC through a toggle switch, with a 10K to GND on each.

There is no power plane, so its 5VDC power comes through board traces.

Ground is... interesting. There is a ground plane, but on the CPLD 2 GND pins have their own vias, 2 GND pins share a single via, and finally 4 other GND pins all share a single via. Each of these vias also are shared by decoupling caps to 5VDC.

My thought is that the poor grounding isn't helping the CPLD deal with any current or voltage spikes, leading to these burnt out chips. Solution: a board redesign/respin.

Is there anything else I might be missing?

I appreciate any and all help!

 

[RetroTechie]

I'd be interested to know how non-used I/Os are connected, and configured. Tied to GND / a supply voltage? Pull-up / pull-down? Floating? Configured as output? Is the I/O voltage also 5V? Same supply as for CPLD's internal supply voltage?

You might want to check out Xilinx documents on this:
XAPP784 - Bulletproof CPLD Design Practices
CPLD I/O User Guide (UG445)

There only 7 inputs, 5VDC through a toggle switch, with a 10K to GND on each.

That's asking for a variety of problems:

• 5V DC used by switches is coming from same source as IC's 5V?
• If separate 5V supplies: what happens if switch inputs 5V, but XC95144 isn't powered up? Are there series resistors in place to account for this situation?

Better use pull-ups with switch to GND.

Also you might want to check for short circuits between I/O pins, and have a good look at how the outputs are loaded. Is this burning up a regular event, or 1st time this happened? (maybe lightning struck or something...)

 

[TenmaNeko]

I'd be interested to know how non-used I/Os are connected, and configured. Tied to GND / a supply voltage? Pull-up / pull-down? Floating? Configured as output? Is the I/O voltage also 5V? Same supply as for CPLD's internal supply voltage?

There are some IO that are connected to inputs on analog switches, but are not used in the CPLD program. There are a couple unused IO's that are unconnected. All unused IO's are set by default to be outputs driving to GND.

The 5V is the IO and INT voltage, only one source.

You might want to check out Xilinx documents on this:
XAPP784 - Bulletproof CPLD Design Practices
CPLD I/O User Guide (UG445)

Thanks! I'll check those out.

That's asking for a variety of problems:

• 5V DC used by switches is coming from same source as IC's 5V?
• If separate 5V supplies: what happens if switch inputs 5V, but XC95144 isn't powered up? Are there series resistors in place to account for this situation?

Better use pull-ups with switch to GND.

Also you might want to check for short circuits between I/O pins, and have a good look at how the outputs are loaded. Is this burning up a regular event, or 1st time this happened? (maybe lightning struck or something...)

There is only one 5V input to the board that supplies the switches and powers the CPLD.

This burning up is a regular event. A new board can be used several times before it dies. Then a new CPLD is put on and it can be used again. For a while.