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Xilinx Sysgen Basics Help

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Muhon

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Hello Everyone,

I've started in the VHDL world, mainly because my University is focused on DSPs and microcontrollers. So I've decided to do research in VHDL and FPGAs to encourage research and development in this interesting area.

Well, I'm doing digital audio processing in the FGPA (XUP Virtex II-PRO). I found out that using the AC97 codec without Sysgen is really, really hard. I was recommended to use Sysgen and so I did. I managed to have audio in and out using the example model a Xilinx tutor sent me.

However, when I try to start from zero, I can't manage to control hardware. My problem is simple... like the "hello world" problem. I want to use a button to turn on a led and the same button to turn it off. It figures that the circuit for it would be the following:

gateway in -> latch (delay) -> gateway out.

I don't know how to tell Sysgen that I want the input signal to come from the button. I've tried the IOB location constraint with no luck. Same for the output. I'm currently running MS WinXP with ISE Foundation 8.2i and Sysgen 8.2i with MatLab R2006a (Because b won't work).

I really appreciate any answers.

Regards,

Julio Leon
 

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