Xilinx Spartan2 BlockRAM initialisation ?

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CADDevil

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data2bram

Hello,

I have one problem.
I am trying to simulate and synthetise the PIC16F84 into Spartan2 FPGA. The implementation of the PIC (I got it from Opencores) use BlockRAM as a program memory.

I would like to know, how I can convert the PIC program (written in MPLAB) from HEX format into Verilog source which I can use for BlockRAM initialisation during emulation and during synthesis and bitstream generation.

I tried to search the Xilinx Web site, but I did not find any solution.

Thx for any help

CADDevil
 

data2mem:29

Thx,

maybe my question was a bit unclear.
I know, how to do it manually. But I am trying to find some way how to do it automatically.

I know that there is Xilinx utility DATA2BRAM, but I am not able to make it work.
Because DATA2BRAM accept either .elf or .mem files as an input, I wrote a simple utility, which convert PIC binary image to .MEM file, I wrote the BlockRAM definition file .BMM which is syntactically correct, but when I am trying to use DATA2BRAM, I am getting error:

C:\bin2map>data2mem -bm test.bmm -bd test.mem -o v test.v -u -p xc2s200 -log test.log

ERRORata2MEM:29 - Inconsistent address space size in ADDRESS_BLOCK 'test_rom'.

ADDRESS_BLOCK was defined as 0x000000400 bytes, but the devices total 0x000000000 bytes.

Do you have any idea what can be wrong ?

Thx CADDevil
 

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