Xilinx "RLOC" constraint

[Klyon]

Hi,

I've got a problem.

There is a 3-bit counter (LOSS_CNT) in my design.

What I want after place-and-route procedure is that all FFs of this counter are placed
next to each other (not spread out across chip). How can I implement this?

Of cource I can use LOC, but I do not want to assign it to exact slicies. I want it to be placed anywhere in chip but next to each other.

Any suggestions?

Thanks in advance!!!!!

 

[farhada]

Have you looked at the following documents:

**broken link removed**

 

[Klyon]

yep, I did, but i didn't help much (that's why I asked that question)