subprogram vitalstatetable.
Guys, when I do post-map simulation model generation as well as
post-place and route generation the message in Xilinx ISE 7 console says:
Started process "Generate Post-Map Simulation Model".
INFO:NetListWriters:635 - The generated VHDL netlist contains Xilinx SIMPRIM
simulation primitives and has to be used with SIMPRIM library for correct
compilation and simulation.
Then my ModelSim application QuestaSim opens but the following error message
appears at its console:
# // QuestaSim 6.1c Nov 17 2005
# //
# // Copyright Mentor Graphics Corporation 2005
# // All Rights Reserved.
# //
# // THIS WORK CONTAINS TRADE SECRET AND
# // PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# // OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# // AND IS SUBJECT TO LICENSE TERMS.
# //
# do testbench.tdo
# ** Warning: (vlib-34) Library already exists at "work".
# QuestaSim vcom 6.1c Compiler 2005.11 Nov 17 2005
# -- Loading package standard
# -- Loading package std_logic_1164
# ** Error: (vcom-19) Failed to access library 'simprim' at "simprim".
# No such file or directory. (errno = ENOENT)
# ** Error: C:/QuestaSim_6.1c/win32/vcom failed.
# Error in macro ./testbench.tdo line 6
# C:/QuestaSim_6.1c/win32/vcom failed.
# while executing
# "vcom -87 -explicit counter_timesim.vhd"
Please explain how to get this library simprim accessible in detail please