Ive defined for my project a Single-Port ROM, using the Block Memory Generator of ISE tools. It appears as part of my project, but i'm having a error message implementing my top module. wich says:
ERROR:HDLParsers:709 - "D:/Projects/Methode_Num_2/Test_BRAM_256X8_2/UART_RS232.vhd" Line 80. BRAM_256X8 is not an entity name
Here's my .vhd:
memory: entity work.memory_sin -- BRAM with the sin values
port map(
clka => clk,
addra => mem_addr,
douta => dout);
Luckily BRAM_256X8 is not only not an entity name, but it is also not a part of your post. Where does the BRAM_256X8 come from? I could guess, but sod that. Could you clarify? Kindly post the VHDL fragment that references this. That might help some.