Xilinx ISE FPGA editor

[richardwli]

ise fpga

Hi
ISE FPGA editor tool provides us a ECO-like method to do little change on .ncd file then gen bit file. This method saves our time.
In real case, there is always a/several sub-module change then we have to do whole flow (synthesis->P&R->bitgen)

I'm wondering, is there exist a method to speed up the entire flow?

Thanks for your response