Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Xilinx FPGA Implementation of DES Algorithm

Status
Not open for further replies.

venkatramana971

Newbie level 3
Joined
Nov 4, 2009
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Nit Calicut
Activity points
1,307
hi every body,


This is venkat, Recently i successfully completed DES Algorithmm in VHDL. Now i would like to implement it on the Xilinx Spartan 3e FPGA kit. Can Any one help me How to assign Input and Output pins. Regarding This project related Material.


Thanking you all,





Regards

Venkatramana.
 

best way to use on board sdram sram whatever present on board.store key and text on memory.best way to reduce pin
 

Concerning any project
use ISE option: User Constraints-> Assign Package Pins.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top