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Xilinx Block Ram initial value problem

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xenix

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Hi,

Look up tables consume too much logic source if table is large. I want to store some data on block ram. Data is loaded as initial values to bram. Ram write is disabled, so it will be like a ROM operation.

When i try to read RAM, it always reads zero, is there something wrong with initial value assignment?

INIT_xx are initial value vectors. What are INITP_xx vectors?

Thanks for the replies.

Code:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity acitablo1 is
	Port ( 
		modulasyon	: in	STD_LOGIC_VECTOR (8 downto 0); --ram address
		clk			: in	STD_LOGIC; --ram clock
		aci1		: out	STD_LOGIC_VECTOR (13 downto 0) -- data out
		);
end acitablo1;

architecture Behavioral of acitablo1 is


component RAMB16_S18 
-- pragma translate_off
 generic (
	INIT : bit_vector := X"0";
	INIT_00 : bit_vector := X"1818181A181D182018241829182D18321838183E1844184A18501856185D1864"; -- initial values
	INIT_01 : bit_vector := X"1846183F18391833182D18281823181F181B1818181618151814181418151816";
	INIT_02 : bit_vector := X"183318441852185D1865186B186E1870186F186D186A18651860185A1854184D";
	INIT_03 : bit_vector := X"0B060B4B0B900BD4169016C016ED17191743176B179017B217D217EF1809181F";
	INIT_04 : bit_vector := X"122A1263129C12D61310134B138513C013FA1435099009C90A040A420A810AC3";
	INIT_05 : bit_vector := X"0684069206A006AF06BF0FD806E206F5070A071E07331114114A118111B911F1";
	INIT_06 : bit_vector := X"0C4F0C710C94062C062E063106340639063D0643065105EE06590605066D0678";
	INIT_07 : bit_vector := X"05C905DA05EA05F70B510B590B630B710B800B930BA80BBF0BD80BF40C110C2F";
	INIT_08 : bit_vector := X"01840275030D037E03D904250466049E04D004FC0524054805680584059E05B5";
	INIT_09 : bit_vector := X"0756079107D10818086508B9091309100910030C0438003203660258030E00C8";
	INIT_0A : bit_vector := X"04F50514053305520572059205B305D505F8061C06410668069206BE06ED071F";
	INIT_0B : bit_vector := X"0365036E037B038C03A003B703D003EA04050422043F045D047B049904B704D6";
	INIT_0C : bit_vector := X"000000000000000000000644054804BB0457040C03D203A60387037203670363";
	INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	SRVAL : bit_vector := X"0";
	WRITE_MODE : string := "READ_FIRST"
); 
-- pragma translate_on
  port (
	DI     : in std_logic_vector (15 downto 0);
	DIP    : in std_logic_vector (1 downto 0);
	ADDR   : in std_logic_vector (9 downto 0);
	EN     : in std_logic;
	WE     : in std_logic;
	SSR    : in std_logic;
	CLK    : in std_logic;
	DO     : out std_logic_vector (15 downto 0);
	DOP    : out std_logic_vector (1 downto 0)
	); 
end component;

	attribute WRITE_MODE : string;
	attribute WRITE_MODE of U_RAMB16_S18: label is "READ_FIRST";

	signal	addr			:	STD_LOGIC_VECTOR(9 downto 0);	
	signal	di				: STD_LOGIC_VECTOR(15 downto 0);
	signal	dip			: STD_LOGIC_VECTOR(1 downto 0);
	signal	do				: STD_LOGIC_VECTOR(15 downto 0);
	signal	dop			: STD_LOGIC_VECTOR(1 downto 0);


begin

	addr<="0" & (modulasyon-"011011101"); --make it 10 bit, remove the offset and load to addres.

	dip<="00"; -- parity is not used, load with zero
	di<=x"0000"; -- write is disabled, so this is unimportant

	aci1<=do(13 downto 0); --data is loaded to output

U_RAMB16_S18: RAMB16_S18
  port map (
	DI     => di, -- insert 16 bits data in bus (<15 downto 0>)
	DIP    => dip, -- insert 2 bits parity data in bus (or <17 downto 16>)
	ADDR   => addr, -- insert 10 bits address bus	
	EN     => '1', -- insert enable signal --always enable
	WE     => '0', -- insert write enable signal  -- ROM operation, dont write
	SSR    => '0', -- insert set/reset signal
	CLK    => clk, -- insert clock signal
	DO     => do, -- insert 16 bits data out bus (<15 downto 0>)
	DOP    => dop-- insert 2 bits parity data out bus (or <17 downto 16>)
	);	
	
end Behavioral;
 

xenix

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I found the solution. My initial value assigntment method was for simulation, not for implementation. In order to implement initial values, attribute method should be used.

Working code :

Code:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity acitablo1 is
	Port ( 
		modulasyon	: in	STD_LOGIC_VECTOR (8 downto 0); --ram address
		clk			: in	STD_LOGIC; --ram clock
		aci1		: out	STD_LOGIC_VECTOR (13 downto 0) -- data out
		);
end acitablo1;

architecture Behavioral of acitablo1 is

	attribute INIT_00 : string;
	attribute INIT_01 : string;
	attribute INIT_02 : string;
	attribute INIT_03 : string;
	attribute INIT_04 : string;
	attribute INIT_05 : string;
	attribute INIT_06 : string;
	attribute INIT_07 : string;
	attribute INIT_08 : string;
	attribute INIT_09 : string;
	attribute INIT_0A : string;
	attribute INIT_0B : string;
	attribute INIT_0C : string;
	attribute INIT_0D : string;
	attribute INIT_0E : string;
	attribute INIT_0F : string;
	attribute INIT_10 : string;
	attribute INIT_11 : string;
	attribute INIT_12 : string;
	attribute INIT_13 : string;
	attribute INIT_14 : string;
	attribute INIT_15 : string;
	attribute INIT_16 : string;
	attribute INIT_17 : string;
	attribute INIT_18 : string;
	attribute INIT_19 : string;
	attribute INIT_1A : string;
	attribute INIT_1B : string;
	attribute INIT_1C : string;
	attribute INIT_1D : string;
	attribute INIT_1E : string;
	attribute INIT_1F : string;
	attribute INIT_20 : string;
	attribute INIT_21 : string;
	attribute INIT_22 : string;
	attribute INIT_23 : string;
	attribute INIT_24 : string;
	attribute INIT_25 : string;
	attribute INIT_26 : string;
	attribute INIT_27 : string;
	attribute INIT_28 : string;
	attribute INIT_29 : string;
	attribute INIT_2A : string;
	attribute INIT_2B : string;
	attribute INIT_2C : string;
	attribute INIT_2D : string;
	attribute INIT_2E : string;
	attribute INIT_2F : string;
	attribute INIT_30 : string;
	attribute INIT_31 : string;
	attribute INIT_32 : string;
	attribute INIT_33 : string;
	attribute INIT_34 : string;
	attribute INIT_35 : string;
	attribute INIT_36 : string;
	attribute INIT_37 : string;
	attribute INIT_38 : string;
	attribute INIT_39 : string;
	attribute INIT_3A : string;
	attribute INIT_3B : string;
	attribute INIT_3C : string;
	attribute INIT_3D : string;
	attribute INIT_3E : string;
	attribute INIT_3F : string;
	attribute INITP_00 : string;
	attribute INITP_01 : string;
	attribute INITP_02 : string;
	attribute INITP_03 : string;
	attribute INITP_04 : string;
	attribute INITP_05 : string;
	attribute INITP_06 : string;
	attribute INITP_07 : string;
	--
	-- Attributes to define ROM contents during implementation synthesis.
	--
	attribute INIT_00 of U_RAMB16_S18 : label is "1818181A181D182018241829182D18321838183E1844184A18501856185D1864";
	attribute INIT_01 of U_RAMB16_S18 : label is "1846183F18391833182D18281823181F181B1818181618151814181418151816";
	attribute INIT_02 of U_RAMB16_S18 : label is "183318441852185D1865186B186E1870186F186D186A18651860185A1854184D";
	attribute INIT_03 of U_RAMB16_S18 : label is "0B060B4B0B900BD4169016C016ED17191743176B179017B217D217EF1809181F";
	attribute INIT_04 of U_RAMB16_S18 : label is "122A1263129C12D61310134B138513C013FA1435099009C90A040A420A810AC3";
	attribute INIT_05 of U_RAMB16_S18 : label is "0684069206A006AF06BF0FD806E206F5070A071E07331114114A118111B911F1";
	attribute INIT_06 of U_RAMB16_S18 : label is "0C4F0C710C94062C062E063106340639063D0643065105EE06590605066D0678";
	attribute INIT_07 of U_RAMB16_S18 : label is "05C905DA05EA05F70B510B590B630B710B800B930BA80BBF0BD80BF40C110C2F";
	attribute INIT_08 of U_RAMB16_S18 : label is "01840275030D037E03D904250466049E04D004FC0524054805680584059E05B5";
	attribute INIT_09 of U_RAMB16_S18 : label is "0756079107D10818086508B9091309100910030C0438003203660258030E00C8";
	attribute INIT_0A of U_RAMB16_S18 : label is "04F50514053305520572059205B305D505F8061C06410668069206BE06ED071F";
	attribute INIT_0B of U_RAMB16_S18 : label is "0365036E037B038C03A003B703D003EA04050422043F045D047B049904B704D6";
	attribute INIT_0C of U_RAMB16_S18 : label is "000000000000000000000644054804BB0457040C03D203A60387037203670363";
	attribute INIT_0D of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_0E of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_0F of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_10 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_11 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_12 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_13 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_14 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_15 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_16 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_17 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_18 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_19 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_1A of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_1B of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_1C of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_1D of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_1E of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_1F of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_20 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_21 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_22 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_23 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_24 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_25 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_26 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_27 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_28 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_29 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_2A of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_2B of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_2C of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_2D of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_2E of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_2F of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_30 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_31 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_32 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_33 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_34 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_35 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_36 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_37 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_38 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_39 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_3A of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_3B of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_3C of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_3D of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_3E of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INIT_3F of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_00 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_01 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_02 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_03 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_04 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_05 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_06 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";
	attribute INITP_07 of U_RAMB16_S18 : label is "0000000000000000000000000000000000000000000000000000000000000000";


component RAMB16_S18 
-- pragma translate_off
 generic (
	INIT : bit_vector := X"0";
	INIT_00 : bit_vector := X"1818181A181D182018241829182D18321838183E1844184A18501856185D1864"; -- initial values
	INIT_01 : bit_vector := X"1846183F18391833182D18281823181F181B1818181618151814181418151816";
	INIT_02 : bit_vector := X"183318441852185D1865186B186E1870186F186D186A18651860185A1854184D";
	INIT_03 : bit_vector := X"0B060B4B0B900BD4169016C016ED17191743176B179017B217D217EF1809181F";
	INIT_04 : bit_vector := X"122A1263129C12D61310134B138513C013FA1435099009C90A040A420A810AC3";
	INIT_05 : bit_vector := X"0684069206A006AF06BF0FD806E206F5070A071E07331114114A118111B911F1";
	INIT_06 : bit_vector := X"0C4F0C710C94062C062E063106340639063D0643065105EE06590605066D0678";
	INIT_07 : bit_vector := X"05C905DA05EA05F70B510B590B630B710B800B930BA80BBF0BD80BF40C110C2F";
	INIT_08 : bit_vector := X"01840275030D037E03D904250466049E04D004FC0524054805680584059E05B5";
	INIT_09 : bit_vector := X"0756079107D10818086508B9091309100910030C0438003203660258030E00C8";
	INIT_0A : bit_vector := X"04F50514053305520572059205B305D505F8061C06410668069206BE06ED071F";
	INIT_0B : bit_vector := X"0365036E037B038C03A003B703D003EA04050422043F045D047B049904B704D6";
	INIT_0C : bit_vector := X"000000000000000000000644054804BB0457040C03D203A60387037203670363";
	INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
	SRVAL : bit_vector := X"0";
	WRITE_MODE : string := "READ_FIRST"
); 
-- pragma translate_on
  port (
	DI     : in std_logic_vector (15 downto 0);
	DIP    : in std_logic_vector (1 downto 0);
	ADDR   : in std_logic_vector (9 downto 0);
	EN     : in std_logic;
	WE     : in std_logic;
	SSR    : in std_logic;
	CLK    : in std_logic;
	DO     : out std_logic_vector (15 downto 0);
	DOP    : out std_logic_vector (1 downto 0)
	); 
end component;

	attribute WRITE_MODE : string;
	attribute WRITE_MODE of U_RAMB16_S18: label is "READ_FIRST";

	signal	addr			:	STD_LOGIC_VECTOR(9 downto 0);	
	signal	di				: STD_LOGIC_VECTOR(15 downto 0);
	signal	dip			: STD_LOGIC_VECTOR(1 downto 0);
	signal	do				: STD_LOGIC_VECTOR(15 downto 0);
	signal	dop			: STD_LOGIC_VECTOR(1 downto 0);


begin

	addr<="0" & (modulasyon-"011011101"); --make it 10 bit, remove the offset and load to addres.

	dip<="00"; -- parity is not used, load with zero
	di<=x"0000"; -- write is disabled, so this is unimportant

	aci1<=do(13 downto 0); --data is loaded to output

U_RAMB16_S18: RAMB16_S18
  port map (
	DI     => di, -- insert 16 bits data in bus (<15 downto 0>)
	DIP    => dip, -- insert 2 bits parity data in bus (or <17 downto 16>)
	ADDR   => addr, -- insert 10 bits address bus	
	EN     => '1', -- insert enable signal --always enable
	WE     => '0', -- insert write enable signal  -- ROM operation, dont write
	SSR    => '0', -- insert set/reset signal
	CLK    => clk, -- insert clock signal
	DO     => do, -- insert 16 bits data out bus (<15 downto 0>)
	DOP    => dop-- insert 2 bits parity data out bus (or <17 downto 16>)
	);	
	
end Behavioral;
 

ram

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you are putting
-- pragma translate_off
-- pragma translate_on

which will not use the code between them for synthesis
 

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