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XC2VP20 FPGA for development board Rocket I/O

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voho

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XC2VP20

Hello everybody :D

I'm working in developpement board Rocket I/O. 8O
We use XC2VP20 FPGA.

Transmitter and Receiver: we use Parallel Fiber optical link. :idea:

I want to ask you some suggestion about the design (clock distribution….) :?:

Thank's in advance :)
 

Re: XC2VP20

I just read all related documents from xilinx website to develop XC2VP20FF896-5 board. Rocket I/O user guide is good enough for circuit & pcb design.
 

Re: XC2VP20

I think you should not use the Rocket IO builded in FPGA , because it is not stabilization .

At first , i use it too , but i find this fault , I ask the FAE in xilinx office , but they can not solve it , so I give up this scheme .
 

Re: XC2VP20

Hello everybody :D

My college have performed several
measurements of the RocketIO's latencies Ml300 evaluation board (VP7 device), but for the moment he reveal that the latency of the channel (transmitter - fibre - receiver) is not constant. 8O

luoliuzhu: what do you propose :?:
elektrom: I can not find documents from xilinx to develop XC2VP20FF896-5 board :idea:
 

Re: XC2VP20

really??? I also plan to use rocket IO, I need to reconsider my plan right now.
 

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