write files in VHDL with index

[Fabien]

Hi all,

I'm designing a test bench in VHDL-AMS and I would like to write files of the simulation results. It works but I'd like a new file after each new simulation or each different parameter of the simulation.

Is it possible to have un index term in the file name depending on the simulation parameter?
The best thing is to have a pin where the input would be a character or string to be added in the index. I don't know how.


my code is:


=====================================================================
ENTITY VHDL_writer IS

PORT(
SIGNAL clk : IN bit;
SIGNAL bs : IN bit;
TERMINAL s1 : ELECTRICAL -- port for the desire index term
);

END ENTITY VHDL_writer;


BEGIN
PROCESS(clk)

FILE outfile : TEXT;
VARIABLE ligne : LINE;

variable b : character := 'h';

BEGIN
IF clk'event and clk = '1' THEN

file_open(outfile,"/prj/shiva3/users/tf38/my_file" & index & ".txt",APPEND_MODE);

IF bs = '1' THEN
WRITE(ligne,STRING'("1"));
WRITELINE(OUTFILE,ligne);
ELSE
WRITE(ligne,STRING'("0"));
WRITELINE(OUTFILE,ligne);
END IF;
file_close(outfile);

END IF;
END PROCESS;

=====================================================================

Thank you very much for your help!

 

[TrickyDicky]

yes you can.

Just convert the index to a string. With VHDL 93 you can use the 'image attribute for base types, eg:

file_open(outfile,"/prj/shiva3/users/tf38/my_file" & integer'image(index) & ".txt",APPEND_MODE);

but with VHDL 2008 there are to_string/to_hstring/to_ostring functions for all standard types:

file_open(outfile,"/prj/shiva3/users/tf38/my_file" & to_string(index) & ".txt",APPEND_MODE);

 

[Fabien]

Thank you for your help and tips on integer conversion.

It seems to be OK but I still do not know how to have the index term. What should I plug to the input port?

My entity is:

PORT(
SIGNAL clk : IN bit;
SIGNAL bs : IN bit;

SIGNAL s1 : IN integer -- this signal is used for the index
);

for the file I have :

file_open(outfile,"/prj/shiva3/users/tf38/my_file" & integer'image(index) & ".txt",APPEND_MODE);

and I get my_file-2147483648.txt

If I put a voltage source it doen't work as the port should be TERMINAL s1 : ELECTRICAL. If I plug a VHDL_block with an OUT : integer, the simulator can't run.
Any other right idea?

Thank you

 

[TrickyDicky]

that will be because you have not set a value for the s1 input. integers default to -2^31 unless something else is specified.