Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Wrapping burst in AXI

Status
Not open for further replies.

ASIC_int

Advanced Member level 4
Joined
May 14, 2011
Messages
118
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
2,234
What is wrapping busrst in AXI? How does it operate?
 

if in any system design, a slave has a memory value of suppose 32bits(for example) and there is a transfer data of 64 bit suppose, then the master uses a wrapping burst inorder not to cross the 32 bit bounday,
i.e if it starts with 8 bit beat transfer 0,8, 16, 24, here it wraps to the earlier stage as there is no more memory left higher than 31 bits.

**broken link removed**
**broken link removed**
ARM Information Center
 
Shivram

Thank you.

I think memory will be 32 bytes and not bits and also it will be 64 butes and not bits. Otherwise I am not understanding. Can u please explain in a more simple manner?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top