Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

will low power design still be a requirement

Status
Not open for further replies.

vlsichipdesigner

Full Member level 2
Joined
May 9, 2007
Messages
134
Helped
16
Reputation
32
Reaction score
9
Trophy points
1,298
Location
India
Activity points
2,367
dear Designers,

todays talk of the town is "Wireless battery charging"
there are couple of technologies available now
* electromagnetic induction
* radio reception
* resonance

If these technologies/techniques are quite successful and could be an commercial alternative is still our low power design be one of our cost function
low power design techniques
* Multi VDD
* multi Vt designs
* Intelligent power management unit
* MTCMOS
* sleep transistors
* clock gating
* DVFS(dynamic voltage and frequency scaling).....

any thoughts???

best regards,
vlsichipdesigner
https://www.vlsichipdesign.com
[Learn ASIC chip design for free]
 

sekapr

Advanced Member level 4
Joined
Jul 27, 2006
Messages
100
Helped
9
Reputation
18
Reaction score
4
Trophy points
1,298
Activity points
1,680
the low power design techniques that u have listed are needed even if you have continuous power supply available. High temperature affects the performance, longivity of the chips. Also the electromagnetic induction works similar to a transformer. It still needs power source(primary coil in a transformer) and the charging device(secondary coil) will be a part of laptop/cell phone. You can't use this charging device if you are not nearby power source. Also if you don't reduce the power dissipation in the chip, your system will get heated very soon and needs costly package and other cooling techniques.
 

cadenceUK

Member level 5
Joined
Aug 15, 2007
Messages
90
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
1,862
MTCMOS techology :

Sub-threshold leakage of a transistor is the leakage current flowing through the transistor when it is turned off. In a perfect switch, such as your light switch, when it is turned off, there is no current flowing through it, and the light bulb does not glow. If the switch is bad, then even though it is turned off there could be some residual current flowing through it, which may be so small that the light bulb does not seem to glow, but its there. Modern transistors are analogous to these bad light switches, they leak when they are turned off. And to make it worse, Moore’s Law allows you to double these bad switches every two years, exponentially increasing the leakage every two years, and now it is becoming noticeable.
Thus MTCMOS are leakage solution !
 

smrjaved

Newbie level 5
Joined
Jun 15, 2007
Messages
9
Helped
3
Reputation
6
Reaction score
0
Trophy points
1,281
Activity points
1,331
Yes the above said points are valid. What ever be the technology advancement, but still energy consumed counts. The more the energy consumed the more cost it is. So to reduce the cost of maintenance of the devices we still need to opt for low power design.
 

ubna

Advanced Member level 4
Joined
Jul 25, 2007
Messages
112
Helped
14
Reputation
28
Reaction score
5
Trophy points
1,298
Location
India
Activity points
1,819
The wireless battery chaging techniques you specified are yet to prove themselves to come out of the research stages. Even if they come their efficiency could only be around 30%.

About low power designs,

Since the transistor density of the chips are ever increasing, to maintain the spent power, low power designs and researches are essential...
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top