width limitation in 0.18um cmos technology in Hspice

[eahmadi]

Hi everyone,
I want to give hspice transistor with large width ie. 1000um, How can I define it without m(multiplier) and NF(number of finger) just with w=1000um? Is it possible?
Thanks in advance,
Ebi

 

[Dominik Przyborowski]

The limitations for fet width is around 10mm. In fact a 1000um isn't a wide transistor ;-), but for single finger wide fet You have to keep on eye very high series gate resistance (very high noise contribution) and non-uniform electric field distribution across the channel.

 

[eahmadi]

yeah man,
but I use MOSFETs.

 

[Dominik Przyborowski]

And I'm talking also about mosfets

 

[dick_freebird]

In most technologies you will violate a "tap"-to-active
rule - rules I know, have a 20um max well tap or sub tap
to active limitation. So if you were wanting a W=1000
you would be limited to a fairly small finger count.

Depending on how the current enters and leaves,
finger electromigration can limit or constrain your
layout style. More fingers is generally better for that.

You may have a max active dimension in the rules.

Then, after all that, the CAD dudes may just put
an arbitrary limit on the symbol & PCell param range
that has nothing to do with manufacturability per se.