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why we don'r recommend use tri-state in the ic ??

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because it is left open and hence there is a very good chance of noise coupling and hence leading to erroneous output...
 

Tri state devices have enable signals which can cause either a bus contention or a bus float fault. As a result when ATPG analysis is done on them, the logical values on these can result in the enable line faults being undetected.
 

it also has some power problem,
Tri state may casue pmos&nmos open at the same time,
so there is a direct paths from the supply to ground.
 

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