Why the voltage swings into negative in my LC VCO design?

[bababui]

Hello,

I designed an LC VCO, with cross coupled transistors to act as a -R in order to make up for the R losses in the LC tank. I have both NMOS and PMOS crosscoupled pairs in order to increase -R. I have a few problems with my circuit.
One problem is that the output of my VCO is not oscillating from 0 to VDD (Vdd=1.2V). It is oscillating from -100mV to about 900mV.
My understanding is that the reason that the output is not reaching VDD might be that the pmos transistors might be cutting off, i'm not sure on that. However, I dont understand why swing goes into negative, It makes sense to me that the inductor is the culprit here, but I tried reducing the value of L and the output was still swinging into the negative. Seems that I need to shift the DC point of the oscillation upward.
Any help appreciated

 

[vp1953]

Re: LC VCO question

Can you post a picture of your circuit?

The voltage can go below 0 (as well as above supply) since there is nothing to hard clamp it to ground - negative voltages are sustained by the pmos pair (if the pmos pair was not there, it would not go below 0)

 

[bababui]

Re: LC VCO question

Here's a picture of circuit that I have.
I don't see how the PMOS can cause the output voltage to go negative in this case.

 

[vp1953]

Re: LC VCO question

I believe it is the pmos thats causing the voltage to go negative - the negative voltage drives the pmos harder. You can try this out - remove the current source at the top of the pmos and put it below the nmos (instead of its source terminal being connected to ground) - you will see that the voltage will now not go negative but will go over the supply voltage.

 

[saro_k_82]

Re: LC VCO question

In a LC tank, only the gain limiting due to non-linearity limits the swing. If you had only a NMOS cross coupled pair and the inductors connected to VCC, the common mode voltage for the swing would be VCC and it could go well beyond supply, but not below ground as the biasing elements go to cutoff and there would be no current to enable the swing.
In your circuit, the swing cant go beyond supply, but there is nothing preventing it from moving beyond ground helped by the PMOS es in saturation. This is not strange for a VCO. The substrate noise is locally cancelled, but the VCO has to be isolated from other blocks.
You can adjust the common mode voltage such that it does not happen (if you want to avoid it).

 

[love_analog]

Re: LC VCO question

You can also lower the amplitude of the bias current to lower the amplitude. This will prevent -100mV also

However,-100mV is not too bad. Typ negative is bad if it causes forward biasing of any substrated diodes => leakage etc.