Why the voltage @ gate is +11V

[siddharthtaunk]

Hello,

Kindly help.

I have attached a circuit.

Please see that the gate voltage is -11V(approx).

Why is that so. I have an 100K resistor between the Gate and the point of resistor divider.

What i assume is NOTHING at the GATE pin (0V)

I have seen the same result in orcad and was perplexed.

Please help me out. Its urgent.

Thank you all in advance.

Siddharth

 

[DLakji]

There is not 0V on the gate, as the gate has no reference to GND.
The only connection to gate is essentially -12V (assuming ideal FET). Hence the ~-12V on the gate

You need to add a reference to GND (e.g. through a resistor) or a dignal path to +12v to change the gate voltage.
In case you do actually need 0V (GND) on the gate, replace gate-source resistance with resistor to GND.

/DLakji.

 

[erikl]

Re: Why the voltage @ gate is -11V

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[siddharthtaunk]

Please click to enlarge.

Thanks

 

[erikl]

Please click to enlarge.

This doesn't work, sorry, at least not with Firefox 31.0 .

 

[KlausST]

Hi,

you have two voltage sources.
One at the top, the other at the bottom of the picture.

The voltage at the bottom voltage source is set to "-12V". Set it to "+12V"

Klaus

 

[siddharthtaunk]

Hi,

you have two voltage sources.
One at the top, the other at the bottom of the picture.

The voltage at the bottom voltage source is set to "-12V". Set it to "+12V"

Klaus

Klaus thank you very much for your reply.

The negetive supply is for biasing the fet.

But can you please explain me the solution a bit more for a better understanding.

Thanks

Siddharth

 

[D.A.(Tony)Stewart]

It seems clear to me you have a depletion mode FET with and IDSS of 30mA at near zero bias voltage on Vgs. What's the problem?

 

[KlausST]

Hi,

(If i need negative voltage i`d turn the battery sign upside down and set voltage to 12.0V...but the function is the same..)

Let´s go step by step.

it is a depletion mode FET and it is slightely conductive, so there is a I-DS of about 7.1mA

Now from the bottom:
* There is the GND symbol. This is the voltage reference. It is 0V fixed.
* Then there is a battery. The "+" sign at the top, but with the voltage setut to "-12V" you get a "-12V" reading at the top.
* then 100R. Gate current through R3 is 0.0A. Current through FET is about 7.1mA. Causing a voltage drop of 0.71V: -12V-(-0.71V) = -11.29V
* then R3 to gate. No current, no voltage drop: therfore the same -11.29V
* then R1: again 7.1mA giving a voltage drop of 0.71V: -11.29V - (-0.71V) = -10.58V
* FET: Voltage at Gate: -11.29V, Voltage at Source: -10.58V giving a V_GS of -0.71V

What else do you want to know?

Klaus

 

[siddharthtaunk]

Thank you very very much Klaus.

and Thanks to EDABoard

 

[siddharthtaunk]

I have one more question

When i ground the gate (0 volts) of the fet, heavy current flows through the device. More than 40ma
40ma. Otherwise it is mere 4ma

What is the solution????
Thanks in advance

Siddharth