#### fahim1

##### Member level 4

this is my code ,and i dont get why the size of this vectors dont match??

i put ?? infront of the vectors that dont match.

all vectrs are std_logic_vectors.

i would appreciate if some one help me

tnx

Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use ieee.std_logic_unsigned.all; ----------------------------behavioral--------------- entity mdbooth2 is port(mpcd,mplr : in std_logic_vector(3 downto 0); result : out std_logic_vector(7 downto 0); clk : in std_logic); end mdbooth2; architecture Behavioral of mdbooth2 is signal tmplr : std_logic_vector(4 downto 0) := mplr & '0'; begin process(clk) variable p1,p2 : std_logic_vector (7 downto 0) := "00000000"; begin if(clk'event and clk='1') then case tmplr(2 downto 0) is when "000" => p1 := "00000000" ; when "001" => p1 := "0000" & mpcd; when "010" => p1 := "0000" & mpcd; when "011" => p1 := "000" & mpcd & '0'; when "100" => p1 := '0' & not(mpcd) +1; if (p1'length = 5) then p1 := "111" & p1 ; --?? elsif (p1'length = 6 ) then p1 := "11" & p1; --? end if; when "101" => p1 := not(mpcd) +1; if ( p1'length = 4 ) then p1 := "0000" & p1 ; --? elsif ( p1'length = 5 ) then p1 := "000" & p1; --? end if; when "110" => p1 := not(mpcd) +1; if (p1'length = 4 ) then p1 := "0000" & p1 ; --? elsif( p1'length = 5 ) then p1 := "000" & p1; --? end if; when others => p1 := "00000000"; end case; result <= p1 ; end if; end process; end Behavioral;