why the minimal channel length is 240nm in .25u technology??

[hbchens]

why the minimal channel length is 240nm in .25u technology of NCSU_CDK?
Hi guys:
I have drawn an op-amp circuit in the schematic of cadence with the tsmc_03d-technology in NCSU_CDK_1.5.1.Its .tf file is as follows:
"TSMC 0.25u
controls(
techParams(
( lambda 0.12 )
( technology "TSMC_CMOS025_DEEP" )
( metal3Available t )
( metal4Available t )
( metal5Available t )
( metalcapAvailable t )
( sblockAvailable t )
( hvAvailable t )
)
)
"
Why is the lambda=0.12um?Why is the lib default minimal length 0.24um ?Does the minimal channel length should be >=0.25um?

 

[hbchens]

Can anyboby give me a response?

 

[zhaoshibin]

I have a same question:Why the wmin is also bigger than the lmin in the CMOS processing?

 

[dozy_walia]

I^^^ Its in PMOS not in NMOSE.. as hole mobility is lower than electrons so PMOS are slower and we use larger width to make them more mobile!
Hope it helps!