Why PMOS used in LDO more than NMOS?

[anhnha]

I am reading an old thread about choosing PMOS in LDO.

Here is the link to previous discussion:
https://www.edaboard.com/threads/32523/
In post 11, Vamsi Mocherla wrote:

PMOS device is usually used in a common source configuration and hence a Low voltage drop of VDSsat. While NMOS device is used in a Sorce follower configuration and hence causes a VGS drop in additional to the VDSsat required to drive it. Hence PMOS is the best choice.

Could anyone explain in more detail? Why in common source, Vds = Vdssat and in source follower, Vds is much larger?

 

[dick_freebird]

You can build a PMOS LDO that works within the input
rails entirely, so long as you have enough negative Vgs
(wrt VIN) to get the on resistance you need.

A NMOS LDO requires a supply above output voltage
(by a fair bit) so when dropout is actually low, you
need a supply above VIN. There are NMOS LDOs now,
especially for the sub-2.5V high current applications,
where you have to provide a VAUX low current higher
voltage control supply, but can regulate (say) a 1.5V
input supply to 1.0V with low-ish power-path losses
and a few milliamps from a legacy 5V supply for the
housekeeping circuitry.