Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Why normal buffers don't have equal rise and fall times compared to clock buffers?

Status
Not open for further replies.

RGR

Junior Member level 2
Joined
Jan 31, 2013
Messages
23
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,418
hi
can any one clarity about this?



Thanks in advance

RGR..
 

FvM

Super Moderator
Staff member
Joined
Jan 22, 2008
Messages
46,925
Helped
13,918
Reputation
28,084
Reaction score
12,563
Trophy points
1,393
Location
Bochum, Germany
Activity points
273,694
What are "normal buffers"? A buffer design that sizes transistors for equal current strength has fairly symmetrical r/f time, you can check with commercially available logic ICs.
 

chiranjeevinaidu

Junior Member level 2
Joined
Jan 1, 2013
Messages
20
Helped
9
Reputation
18
Reaction score
9
Trophy points
1,283
Activity points
1,400
Hi,


clock buffers having drive strength is more compare to normal buffers.and it's having doping concentration is also high.......
so high drive strength buffers having equal rise and fall times.....tr and tf
 

gangadharn

Newbie level 6
Joined
Feb 18, 2010
Messages
11
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Location
india
Activity points
1,343
Hi,

I have seen normal buffer also having same rise/fall transition this we call balance normal cells. But CTS cells are still special since its propagating delay are smaller than normal buffer of same drive and higher driving capability.

Regards,
Gangadhar Naik
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top