Why nobody has interest in DFT?

[linuxluo]

hi,
where is the mirror site

 

[flatulent]

right side

At the right side of the spread sheet style rectangles there are the words "free mirror" which is the link to the free mirror site. The links further up the page were erased in a disaster that occurred a few months ago. In general, it takes 2-3 days for the file to get to the mirror site. The advantage of using the mirror site is that it does not reduce your point totals.

 

[eins99]

Ah la, good tips. Tks. flatulent.

 

[qlyus]

Here are some Mentor Graphics' technical publications.

Embedded Deterministic Test - DFT Technology for High-Quality Low-Cost IC Manufacturing Test
https://www.mentor.com/dft/fulfillment/edt_12577.pdf

Embedded Deterministic Test for Low Cost Manufacturing (ITC 2002)
https://www.mentor.com/dft/fulfillment/embed_10537.pdf

Reducing Simulation Mismatches in Design-for-Test (DFT) Implementation
https://www.mentor.com/dft/fulfillment/reduce_8304.pdf

Using FastScan Diagnostics to Improve Time-to-Volume
https://www.mentor.com/dft/fulfillment/diag_wp.pdf

ATPG pattern compaction -- the next wave
https://www.mentor.com/dft/fulfillment/atpg-pattern-wp.pdf

Testing Large-Capacity CAM with MBISTArchitect and FastScan MacroTest
https://www.mentor.com/dft/fulfillment/large-cap.pdf

Scan-Based At-Speed Testing for the Fastest Chips
https://www.mentor.com/dft/fulfillment/motowp_whitepaper.pdf

Designs with Multiple Clock Domains: Avoiding Clock Skew and Reducing Pattern Count using DFTAdvisor and FastScan
https://www.mentor.com/dft/fulfillment/multiclock_whitepaper.pdf

Solving the Challenges of Testing Small Embedded Cores and Memories Using FastScan MacroTest
https://www.mentor.com/dft/fulfillment/dft_whitepaper.pdf

 

[sutapanaki]

Re: It seems few know DFT

Anyone has or can upload the following book:

Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits
by Michael L. Bushnell, Vishwani D. Agrawal

ISBN: 0792379918

 

[tom123]

DFT is crucial for IC manufacture and quality assurance,

I lvoe her.

Why nobody has interest in DFT?

 

[chandhramohan]

Re: It seems few know DFT

Hi all DFT experts ,
I am knew to DFT & my work will be on that . It will be helpfull if u can upload books / pdf / material on that .

Thanks in advance .

Regards
Chandhramohan

 

[ms2004]

Re: It seems few know DFT

Hello there,

I can say every chips needs a DfT (Design For Testability), and that helps to deliver these sufficiently tested. Many DFT enginners does not share topics on DFT because most of EDA tools are very powerful, and those tools can take care of most of the tasks. As a concept DFT is very simple, but very important.

-Milind Sonawane

 

[quake]

Why nobody has interest in DFT?

DFT is the important issue in ASIC industry.

but Many engineers have not the interest in DFT.

I think because Cad tools is very powerful.

Nevertherless, we must study DFT basic and research effective method in DFT.

Yeah, it is extremely important and there are realy some designers are interested
in it when just begin to learn that, but after a while, they may no longer want to do it with their job anymore, since they may find it realy a work of labor with experince rather than techniques. There are a few DFT designers in our company,
I can see the condition like this

 

[gold_kiss]

Re: It seems few know DFT

Please reupload the entire documents .....elektroda has removed them all.

Thanks,
Gold_kiss

 

[dr_dft]

Re: It seems few know DFT

I am trying to start a website to collect DFT info on the web. It is still under construction, but please let me know if you have any suggestions on what you would like to see on the website.

Thanks!

**broken link removed**

 

[horzonbluz]

Re: It seems few know DFT

Good idea!
We can collect DFT papers and some other data in your website.

 

[Thomson]

Re: It seems few know DFT

Hi, all
Currently I'm implementing a small SoC project using several 512-byte FIFO, and I have no idea about the drawbacks of using more such FIFOs.
<1> if one more 512-byte FIFO is included, of course the system performance will be ehanced; however the disadvantages of dosing so is not very clear! Can anyone tell me about this, especially on the testing cost?
<2> if the die area is not determined by the FIFO size, instead by the pad limited. So can any one tell if more FIFOs are added, then what does the fabrication cost rise? can any one tell the extent?
<3>when the die area shall be determined by the pad or the core area? can you tell me when manufactured in 0.18/0.25 um etc.

Thanks in advance!

Thomson

 

[6wings]

Re: It seems few know DFT

I am a beginer of IC design.

 

[ywguo]

Re: It seems few know DFT

Hi,

Why cannot I download the linked files?


Yawei

 

[anjali]

Re: It seems few know DFT

please anybody reupload the DFT documents. electroda has removed the links

 

[the_jackal]

Re: It seems few know DFT

The website i.e. **broken link removed** seems to experiencing problems.

 

[dr_dft]

Re: It seems few know DFT

Website seems to be up and running. I added a few more links.

 

[cheelgo]

It seems few know DFT

Hi, dr_dft, I just check your website, it is quite good now. very useful links for learning. Many thanks!

 

[matthew_wang]

It seems few know DFT

These uploaded file can't be download directly, plase tell us the 'link' of you download files.
Thanks