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Why my PLL unlocks at low temperature?

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liberal

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At low temperature(-40),My PLL unlock .why?how to solve ?

and the synthesizer was shock,it may unlock or the phase noise degrades,how to solve?
I am puzzled.........Thks
 

pll+unlock

There are several possible things.

For low temperature, the amplifier in the feedback loop misfunctions. Monitor the voltage to the VCO control input. Also try characterizing the VCO by itself at the low temperature. Measure the frequency for different control voltages at room temperature and at -40.

The vibration problem is mechanical. Something in the circuit open or shorts. Or the VCO frequency is varied by shock.
 

Re: PLL unlock

The PFD PLL chip such as ADf4113 has infinite capture bandwidth ,why still unlock?
 

Re: PLL unlock

It is possible that there is a big variation in the VCO frequency. Try to change the pll output frequency (change the comparison frequency for example) and see if the pll lock at lower frequency.

By
 

PLL unlock

the PLL is restricted by the VCO , so even if the PFD is infinte locking range the VCO has a certainm tunning curve
 

Re: PLL unlock

You must do what flatulent suggests. If at -40 degrees whatever, the tune line for the VCO is at 14 volts, and the power supply rail is at 15 volts, then the loop unlocks because what the VCO really wanted was to see 14.5 volts but the op amp can not get there.
 

    liberal

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Re: PLL unlock

I agree with biff44.
Usually a VCO is done with a LC oscillator. When you change the temperature the L and C value change. If you have an integrated VCO (integrated L and C) there are big variation (order of +/- 20 % of each value) in the values than change the oscillation frequency. You need to see the voltage in the filter loop: for sure it is near Vcc or ground. You can try to change the reference frequency in order to lock the PLL, but if the VCO has changed too much its oscillation frequency you will not synthesize your wanted output frequency.

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Re: PLL unlock

when under Mechanical Vibration,there are sidebands near the carrier,how do the vibrations convert to electronic signal as sidebands?
 

Re: PLL unlock

So, what happened? Did you find the reason the PLL unlocked at -40????


Most likely reasons you have vibration induced sidebands:
1) your reference crystal oscillator is onboard and has vibration induced phase noise
2) your free running VCO has a lot of vibration induced phase noise AND
a) you have insufficient open loop gain, or
b) you have insufficient loop bandwidth

Rich
www.MaguffinMicrowave.com
 

Re: PLL unlock

yes,at -40,the Vtune is not enough.
 

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