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Why Layout have more ports than source when doing LVS?

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swgchlry

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the layout is generated by Encounter and Drc free. When I do LVS, calibre told me that there are some ports in the layout are missing from source netlist. I found that calibre regarded some "wire" nets of source netlist as ports and the top module of the netlist(generated from layout) has more input/output ports than the source netlist. Can sb. help me?

Layout netlist:

.Subckt XTop port1 port2 port3
...
.end

source netlist:

.Subckt XTop port1 port2
...
Xxx VDD VSS ... port3
...
.end

Why calibre move port3 to the top module's input/output port list?
 

swgchlry said:
the layout is generated by Encounter and Drc free. When I do LVS, calibre told me that there are some ports in the layout are missing from source netlist. I found that calibre regarded some "wire" nets of source netlist as ports and the top module of the netlist(generated from layout) has more input/output ports than the source netlist. Can sb. help me?

Layout netlist:

.Subckt XTop port1 port2 port3
...
.end

source netlist:

.Subckt XTop port1 port2
...
Xxx VDD VSS ... port3
...
.end

Why calibre move port3 to the top module's input/output port list?




This is due to power and ground signal which will be there is layout not in netlist.
 

pranam.bhagavan
Would you explain it in detail?
I don't thnik it is due to the power and ground signal because both of the layout and source have VDD and VSS.
 

Hello,

you have 3 connections in the layout netlist and just 2 in the source netlist.
You must so look at if there is an open in your layout.

This problem can actually have a link with VSS or VDD. It depends on how you have made your connect (real or virtual).

Check your layout(net name), read carefully your extraction report and you have a lot of chance to find your problem.

If you are other question don't hesite to go on :
**broken link removed**

Nice day.
 

I have never experienced problems like this before...

As far I know,
1. If Layout has more no.of nets/ports than Sch, then there is something open in the layout.
2. If Layout has less no.of nets/ports than Sch, then there is something open in the layout.

There may be some layers/labels which purpose is in Pin layer. In this case, the Calibre recognizes the pin layer/label as port..

Just check your layout...

Thanks,
Kumar
 

it is possible something might have been renamed by mistake in your layout or if it was disconnected...usually in layout this happens when you open in edit mode ....just some manual mistakes.

The LVS is accurate ...if its reporting some mismatch then ...there is definetly something not right.


Thanks!
 

maybe you will check " Port Layer Text " in your lvs rules.
 
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    MNBahr

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