many MCU's P0 port need a external pullup resistor??
why??
the datasheet said it is P0 a open drain port.
what's a open drain(open collector) circuit ? and why it needs a external pullup?
thanks
MCUs are designed to have a P0 or Port A designated for wire-and connection or current sinking operation, which requires open-drain in CMOS. This is to resemble open-collector that was used in many TTLs in the past between 60s to 80s, and some are still used today. Especially the case of Totem-pole which suffers current loading issues in wire-and connection, open-drain resolves this by offering high impedance, so if the port pin does not require to send any signal to the wire-and connection, it simply sets to high-impedance.
Wire-and connection is commonly used in wire-and buses such as I2C, PCI, VMEbus and etc for bus grant, SDL, and other handshaking or control signals.
An alternative to wire-and is Tri-State buffer, but open-drain is simple and cheap.
What?
Open-drain is a configuration usually used as output stage in many I/O interface. It uses an NMOS transistor, with its gate connected to the control signal for 1 or 0, its source connected to ground or VSS, and drain left unconnected called "open". This open-drain only gives two states, high impedance or hi-Z (when NMOS is turned off), and logic 0 (when NMOS is turned on).
To achieve logic 1, it requires an external pull-up resistor connected to the drain on one end, and to the VDD on the other end.
With pull-up, there is no high-impedance state. Instead, when NMOS is turned off, the current flows from VDD, through the pull-up resistor, then to the load on the opposite end of the line connection. The voltage at the node connected to the resistor and the drain of NMOS is close to VDD, thus giving a logic 1.
For example,
1. With pull-up, you get logic 1 and 0 at the output (node connected to the drain and resistor) depending you write 0 or 1 to the NMOS, respectively. If there is an inverter before the gate of NMOS, you write 1 or 0, respectively. If you want to sink current that flows from a VDD through the pull-up resistor and a LED. To achieve this, you set this port pin to be an input by writing to the Directional Data Register Control or DDRC. Usually it is set as input by default. Then write a logic 1 to this port pin to sink current. The transistor used in open-drain is usually a NMOS. If it has an inverter before it, write a logic 0 to the port pin instead.