Why is this constraint violated?

[ise_lewis]

I use the following constraints :

set_clock_uncertainty 0.2 [find clock scl1]
set_clock_latency 0.5 [find clock scl1]
set_clock_transition 0.5 [find clock scl1]

constraint report the violations

min_delay/hold ('scl1' group)

Required Actual
Endpoint Path Delay Path Delay Slack
-----------------------------------------------------------------
I3/I31/buffer_reg[0]/D 0.56 0.00 r -0.56 (VIOLATED)
I3/I31/rd_reg/D 0.68 0.42 f -0.25 (VIOLATED)
I3/I31/nack_reg/D 0.59 0.34 f -0.25 (VIOLATED)

When I increase value of set_clock_latency, violated value also increase.

I don't know why is violated?

 

[LinXiaoling]

Constraint Violated

do u use DC? the command "report_timing" and the full understand of the setup and hold time may help u .