why get negative gain value?

[walker5678]

common source, negative gain

I am designing an op amp with folded cascode input stage , and a push pull common source output stage. But after hands on calculation, i run spice simulation, and the result showes minus gain value.
What's the problem might be?

 

[safwatonline]

why get minus gain value?

post ur schematic

 

[walker5678]

Re: why get minus gain value?

the circuit[/img]

 

[aomeen]

Re: why get minus gain value?

I dont understand what is the problem with negative gain ??

The opamp is inverting, a common source input stage has a 180 degrees shift..

Nice circuit by the way, I like the low voltage current source..

 

[elbadry]

Re: why get minus gain value?

You mean you ar getting a -ve gain in dB?

You need to check the operating regions of the transistors ( be sure they are all region 2 )

If this is OK, then I think you need a closed loop simulation ( perhaps using stability analysis "stb" in Cadence ). The class AB output stage is most probably unstable ( you cannot guarantee both N and P MOS are in saturation in quiescent mode, due to current mismatc between the two )

Hope this helps...

 

[walker5678]

Re: why get minus gain value?

when i check the DC operating point, found the out voltage was driven to close Vcc(4.4V), and some transistor in the circuit seems out of saturation region.
I think i should re-decide the W/L ratio of the transistors.

 

[ehsanelahimirza]

hi

plz try to increase biasing volatges.
if then problem persisits then it would b problem with soft u r using

 

[walker5678]

It's the model related problem, i changed model files and got the resonable result.

 

[fendy]

1)The CKT is typical ClassAB.It need balance @M16,M17,M18,M19,M20,M21.

2)Use the RC is better than C only for compensation.(10pF is too large)

3)In the low voltage current source ,how to ensure the commond gate operation at satuation region ?

 

[walker5678]

hi, fendy
Thanks for your advice.
For the low voltage current source, Vg(M7, M9)=Vth+Von, (where Von=Vgs-Vth), and Min. Vg(M6,M8)=Vgs6+Von7=Vth+Von6+Von7=Vth+2Von(cause W6/L6=W7/L7=W8/L8=W9/L9).
So the voltage drop on the resistor R0 is Von, set your Von ( for example, 0.25V) and calculate R0 by current. Then calculate W/L of M6,7,8,9. The voltage on the drain of M8 can be as low as 2Von, which is 0.5V.