Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
F/F are the very basic and important in latching the data from one destination to other.
So to latch or to pass a data the data should remain constant for a short duration if not the F/F will not know what is that.
Soif data remain constant, then only i can pass, else the data will be unknow or flase data may enter before the clock makes transition. The constant reamin data will be latched along with the clock pulse from D input . this is called as Setup time
So after latching ,the data will be on the output point Q. After obtaning on the pin Q the data must remain stable or must be at hold position for a small duration. That is hold condition after the clock has made a transistion.
If the data ontained on Q output is nit stable, then the obtained data may be wrong or the output will have the same old data , not the nwe data which has latched.
this is called as hold time.
So there will be two F/F one launch and other capture. Setup viloations happens in Caputre and Hold violations happens in Launch.
How u calculate setup time for a flop ?? every flop has setup and hold time right??
So how ur getting that setup and hold?
Don't explain me with the help of equations bcoz that is for meeting the setup requirement and hold requirement for the flip flops................
Every FF has some switching component like transistor or diode inside it. And also have input parasitic Capacitance associated with each FF.
So the SETUP time is the time required to charge that input capacitance so that input signal can reach to input switching device of the FF. Obviously the capacitor will take some time to charge up. Thus input should be present some time before the active clock edge, this is nothing but SETUP time.
Similarly when the input signal is present at the input, switching devices will take some time to swich to appropriate level according to input state & previous state. If during this time input changes, switching device may not switch to proper level(cutoff or saturation), it may conduct in linear region also. Thus during this time input should be stable, this time is nothing but HOLD time of the FF.
I think from this u will have very clear idea why there is SETUP and HLOD time for FF.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
