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why does a chip need the power supply of 3.3v and 2.5v

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tybhsl

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Here I've got a chip which has power suply pin VDD of 3.3v and 2.5v at the same time. What does it needs both of them? Is it that they will used to directly drive the drain and source of the EFTs (Field Effect Tube)respectively in a CMOS ASIC chip? And what voltage will logic "1" or "0" will be represented as? Tanks a lot!
 

flatulent

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This is done where there are several sections. The 3.3 V section interfaces with the outside world. The 2.5 V section has lower breakdown transistors that can run faster.
 

tybhsl

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In this chip powered by 3.3v and 2.5v at the same time, which will used to directly drive the drain and source of the EFTs (Field Effect Tube)respectively in a CMOS ASIC chip? I mean, what voltage will logic "1" or "0" will be represented as? Tanks a lot!
 

flatulent

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There are level converters within the chip between the two sections. The outside world only sees 3.3 V logic levels.
 

nittinsharma80

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Hi
this multivoltage scenario "can be" just one of the guidlines followed in order to reduce the power consumption. multiple voltage domains concept asks for higher voltages for timimng critical path vallyes and lower voltage regions for timing non-critical paths.
Else this can be because of the dependence of the peripherals (operating onn higher voltages) interacting with the chip and the chip operating at lower voltages.
there can be other reasons also.
I hope it helps
regards
 

tlihu

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In most cases, 2.5v is used by 0.25um device, especially logic gate, while 3.3v is used by I/O interface circuits and/or analog IPs.
 

tybhsl

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Assumed 2.5v is used to drive chip core, then in order to drive the drain and source of the FETs (Field Effect Tube)what voltage is needed respectively in CMOS logic? I mean, what voltage will logic "1" or "0" will be represented as? Tanks a lot
 

billjoy

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Dependence on the design(datasheet)

in your case : i THINK 1 is 2.5~3.5
 

funzero

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3.3v for I/O pads 2.5v for core logic and analog input need ?
 

sunms

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It's not strange. Maybe you shall investigate the chip and find out each supply's aim.I once met a chip having four supply,1.2v,1.8v,2.5v,3.3v. The 3.3v is for TTL interface,2.5v is for lvds,lvpecl interface,...
 

tybhsl

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Then what voltage will logic "1" or "0" be represented as in this chip? Tanks a lot!
 

shawndaking

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now days devices use different voltage for the core, i.e the digital part is fed from 1.2 - 2.5v and i/o buffers/drivers voltage which is generaly 3.3v that is used to connect to the outside world (other devices) in lvtll\lvcmos levels.
 

gaonkc

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3.3v is IO power. 2.5v is core power
 

tutx

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2.5 volt used for core with the goal of increasing the speed of chip, while 3.5 volt used for I/O blocks due to the interface problems.

For logic level:
logic '0' : from 0 volt to ~30% volt max.
logic '1': from 60% volt max to volt max.
 

minhle

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the represetntation of '1' and '0' depend on your specific design. the voltage level depends on the threshol voltage that you use(.low VT, standard VT or High VT.) .
 

ic_kuang

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Normally, there are different power supply for IO cell and core cell in a chip, 3.3 is supply for IO, 1.3, 1.8 or 2.5 for core cell.
 

Hero

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Hi,

Power disipation is serious problem for today high speed chips (processors, graphic accelerators, fiber optic interfaces and high speed, high densty CPLDs).

For CMOS devices Pd~f*V*V. When you reduce core voltage you can use much higher working frequency at same power dispation.

But problem is how to interface chip with outside noisy world. With dual voltage one for core and one for IO pads you can get much higher working frequencies for same power disipation.
 

godsun

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different region have different voltage and 1 or 0 is different voltage in different region and there is a convert different region, we know Multi-voltage is more complex but save more power in high speed chip
 

wangkl

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If u really get the chip design in a formal delivery,
U could trace the power pads and check what they are supplying!
Normally, there should be some doc to discribe it.
 

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