Which one is better Vera or Specman?

[carrie]

Can anyone tell me which is more popular, powerful, and easy learned? thanks.

 

[zhangpengyu]

vera vs specman

vera is easy!
It's like c.

 

[khorram]

specman vera

Vera is easy to lean, but Specman is more popular and powerful. Both of them are like C language. In Specman, you can write different kinds of properties and assertions.

Regards,
KH

 

[wadaye]

e language specman

vera is easy!
It's like c.

Yes Ver@ is easy to learn. But Specman is more popular because it's strong ability.

The speed of Ver@+NC is terrible.

 

[soccer]

specman vs vera

where can download Specman tutorial doc?

 

[khorram]

verification flow with specman

See the following link:
**broken link removed**

Regards,
KH

 

[saho]

different specman execution phases

I love Specman. It is very very much like VHDL, with few but powerful cosmetics.

Given the choice, I will be pick Specman E language, which is adopted as IEEE verification language. Do a search and you will find the official page. Vera? I think it is going into development of SystemVerilog. If you consider the customer list of Specman Elite, you will NOT be so convinced that it is going to be dead in few years. Again, skeptics will tell you a DIFFERENT story. Novas Software Inc has provided an interface "nbench" to read E file during debugging phase.

The execution flow of Specman E is not straightforward.

Specman E language provides Aspect oriented interface, more like Aspect oriented JAVA and Jeda (from Jeda Technologies).

There is an e-book on "Design verification with E" posted last December 2003.

Good luck.

 

[carrie]

specman tutorial

Thanks for above replies. I do also think specman e is more powerful and popular. It's strange that my manager asks us to setup verification environment using vera.

 

[aji_vlsi]

difference specman and vera

Thanks for above replies. I do also think specman e is more powerful and popular. It's strange that my manager asks us to setup verification environment using vera.

While I agree in general that E is more popular and more powerful at times, here are certain factors that one may want to look at:

1. Though E is on its way to IEEE standardization, I am yet to hear from any other vendor support for E than Verisity. As we all know, the more the number of vendors, the better it is for the customers

2. On a related note to (1), SystemVerilog's TB portion has a lot of advanced features that have been successfully used by high end verification teams in the recent past and is more close to VERA than E. SV is enjoying support from all the main EDA vendors (SNPS, Cadence & MTI).

3. Specman - an implementation of E language does have certain issues as noted by SAHO in verificationguild.com, see: http://www.geocities.com/avidan_e/specman_tips.htm

Main point that caught me was the generation issues.

4. Cost of Specman vs. VERA - this could well be one of the main reasons why your manager is saying what he/she is saying!

I have great respect for Verisity and am eagerly looking forward to the future.

Regards,
Aji
http://www.noveldv.com

 

[quake]

vera and e language differences

Vera may be going to dissapear and Synopsys is no longer developing it with its VCS tool anymore. E is very good and the tool with Specman are also automatic and powerful, they realy save your effort, but it may still has a unpredicable future , Verisity had already put their effort on other verification methodologies, but still their stocks drop down

 

[saho]

vera e-specman

Hello Again:

Ya, as pointed by Aji, I have posted a subject "Seeking TRUTH: Specman Elite" at Janick Bergeron's Verification Guild. Got some replies, even 1 from Verisity representative.

Now, about support for Specman Elite, I believe these companies support/back Specman Elite language testbench work:

SynaptiCAD (Testbencher Pro)
Novas (nBench)
NoBug consulting

As Verisity recently acquired an HDL simulator company (Axis Systems), I believe this move somehow improve their chance to emerge to a winner. No one can tell! But, time will do so.

As for SystemVerilog, I think it is a pretty good option. But, there are still plenty things to be resolved (compatibility between HDLs, interoperability issues, LRM refinement) and most vendors only support a subset of its syntax. Next year, we may see better support. Talking about MTI, my experience suggests that a useful and stable 6.0 version will be around some time in late summer 2005. It is definitely flaky now. I have tried 5.8 and found myself revert to 5.7G (simply brilliant, but was released in Oct 2003).

I think until SystemVerilog is fully supported, combination of HDLs + PSL + HVLs will continue to flourished.

 

[hawk_chenbo]

specman vs vcs-vera

Vera is not popular as Specman E.

 

[Arnold]

vera Vs specman

specman will have a new release soon under cadence, we will get to know cadence's supporting strength of this splendid tool then.

 

[sansprint]

Re: vera Vs specman

someone side vera is very easy to learn ,anyone can give me an simple example programe ?thank you very much ! i find it very difficult to learn but i must to use it!