Which language is better Vera or Specman E ?

[shemo]

vera Versus specman

My first impression
specman e language for verification is bit tough to master, but it's constraint driven method is pretty powerful,

vera has language similar to verilog, easy to master.

Between the two which one would you choose.

thx

 

[CRiSP]

Re: vera Versus specman

i select vera.it is easy to learn.

 

[nanako]

the learning cycle for specman is the tough part. however if u managed to master the e-language, the usage is pretty easy.

vera on the other hand is easier to master the language.

 

[crystal]

Other than the comparison between languages, how about the tools itself?
which is more powerful / user-friendly - Vera or Specman? how about the rest like testbuilder?

 

[sigurdwang]

Re: vera Versus specman

As I knew, more and more engineer and company use the specman but vera, so I choose the big side.

 

[thecat]

Re: vera Versus specman

I use Specman.

Specman it's used especially for it's lists and coverage features. If Verilog for example would have the possibility of generating dinamic structures (lists) and collecting functional coverage, Specman wouldn't have appeared.

In fact I think that the usage of specman will decrease ater the release of ModelSim 5.8 which will have full supoport for SystemC language that has all the features of the E language.

 

[rakko]

Re: vera Versus specman

If you are just starting and want to select a tool go with VERA. For one. synopsys gives it away for free with VCS. Two, It uses C++ not propriatery e. If you know C, you are half way there. Synopsys is trying to kill specman and its just a matter of time before specman disappears into oblivion. All this aside, specman interface is a lot harder to understand than VERA with no good after sale support.

 

[linuxluo]

Re: vera Versus specman

hi,
besides rakko said, I think one advantage of vera is that you can use open vera assertion in your coding. ova is more easy to learn.

 

[thecat]

Re: vera Versus specman

What is the difference between SystemC and Vera then? It's not quite clear to me, since both of them are C++ related.
One more thing: E is no longer Verisity property: **broken link removed**

 

[yankuangtu]

Re: vera Versus specman

we use vera,because it is easy to work with other eda softwares of synopsys .how about you?

 

[alex king]

I think specman will become more popular.
So it is better study specman now.

 

[voidman]

yes, we use specman e.

 

[Robin_zhu]

Re: vera Versus specman

What is the difference between SystemC and Vera then? It's not quite clear to me, since both of them are C++ related.
One more thing: E is no longer Verisity property: **broken link removed**

SystemC aims at system design--modeling both hardware and software.
Vera mainly targets verification,then.
Does anyone here really use these languages in pratical design project?

 

[Aormon]

Re: vera Versus specman

we use vera ,and we like it!

 

[andromeda]

Re: vera Versus specman

We use e/Specman and our experience is:
- e is very hard to learn, especially for pure HW guys; for SW guys it is little easier (not to many people are familiar with aspect oriented language concept, but if you use object oriented languages long enough, it is not that hard), but still there are lot of HDL related things like concurrency and interface between e and HDL
- Licenses are relatively expensive and it is hard to convince managers to spend money for something from which you will not benefit too much if you don't change completely your verification approach
- If in your verification environment majority of your tests is top-level testing and you don't want to concentrate more to block-level verification you could forget about e
- Vericity guys are very helpful, and, if you are one of their big customers, they will assign one guy permanently to you, they will develop some basic eVC (reusable verification component) for you for free, and give you lot of trainings not for free (without some serious training you could almost forget about using of Specman)

We also tried Vera, which is much easier to learn, but much, much less powerful then e.

 

[zyphor]

Re: vera Versus specman

It depends,
for startup company, Vera is a good tool: cheap & relatively powerful.
Although Specman is powerful, I think Systemverilog will be the trend.

 

[weilijun]

Re: vera Versus specman

I select vera.
It supports class and list. These functions are very useful for verification.

 

[saurabh_vlsi]

Re: vera Versus specman

Hi group,
Can anybody tell me about the pricing of VERA and SPECMAN. What is time required to learn these tools and are companies outsourcing there projects for verification?

saurabh

 

[zysmith]

Re: vera Versus specman

specman seem to be stronger.

 

[masai_mara]

Re: vera Versus specman

To be specific, I feel there are more 'e' users compared to vera users. And both 'e' and 'vera' have found good success in companies using them as its has eased the verification task. They also have been around for about 10 years which makes them very stable. As many have said vera might be more easier to learn but learning is just a one time phenomenon and should not dictate the choice. They were the only HVLs available but now many of the features in them has been incorporated into system verilog. Hence system verilog is going to be a very good candidate for HVL in the coming years. But for now its either e or vera as tool support of system verilog is still not complete and its also in the process of becoming a ieee std.