Can any body give the link for fully functional free IP Core for 8051 Microcontrollar...................................................................................................................
They : http://www.oregano.at/eng/index.html have a very good single cycle core of the 8051 uP.
I gave it a shot on the Spartan 3 FPGA.
Performed very well including interrupts.
My 100% recommendation for version 1.4 and 1.5 of their cores.
you need to supply three memory modules yourself : RAM, XRAM and ROM specific to the platform you are going to implement your design.
For Xilinx it will be BlockRAM and for other platforms some suitable counterpart.
Once those items are integrated with your core ( some VERILOG or VHDL will be needed here ) you need to initialize your ROM with the compiled binary for your uC.
Of course you need a suitable .ucf file defining your I/Os, and you are ready to implement your design using you favourite tools.
you are obviously a very kind person who happens to open a can of worms sometimes
It is great to have contributors like you on this forum. Too bad I can not give you a "helped" feedback, as I did not post the question to begin with.
to hock,
for implementing memory(RAM, ROM), you can just launch Xilinx ISE, launch IPcore wizard(GUI), in that u will see a lot of cores. Amongst those just select RAM/ROM, customize it using a GUI. It (wizard) will use BRAM resource of u r FPGA.