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Where can I buy XC18V02VQ44C chip?

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Vonn

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XC18V02VQ44C Problem

I need the chip XC18V02VQ44C urgently ; Does any body have even one chip I can buy it from him ..
If any body can help please PM me
 

speedoak

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Re: XC18V02VQ44C Needed

ask xilinx FAE for some free samples!!
 

speedoak

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Re: XC18V02VQ44C Needed

XC18V02VQ44C and V04 have some problem, actually we found some of our boards in field for one year, and lost fpga data!!! It make us nuts
 

Vonn

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Re: XC18V02VQ44C Needed

Do you mean that the data in flash is corrupted or you mean that the FPGA lost the data loaded from flash ?
 

zape

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XC18V02VQ44C Problem

I remember a Xilinx alert about all XC18V00 Configuration PROM devices shipped from Xilinx starting June 2000 through June 2001.

Check it.
 

Vonn

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Re: XC18V02VQ44C Problem

I have got one and the production date is 2003 week 28 so I don't think It have a manufacture problem ... but Iam very interested to know the problem of data losing beause my design is based on spartan II which is designed to be configured through the XC18V02 flash and I have a problem that the fpga doesn't function correctly after a certain time and I don't know why ?
 

zape

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XC18V02VQ44C Problem

If the FPGA starts working well but after "x" time stops working, the problem is not in the flash. Are you monitoring the supply? Does the Done pin changes its state?
 

Vonn

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Re: XC18V02VQ44C Problem

Is it possible to FPGA to request reloading bit stream from the flash under any condition ? If yes , how can i control it ?
 

zape

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XC18V02VQ44C Problem

IF the FPGA charge pump detects a low supply level, it shall restart the configuration load process setting "Init" low and so on.

1) I would try to ensure that the unexpected behaviour is not due to a failure in the supply (perhaps a bus conflict). It this happens then a configuration load shall de initated, so that just using a scope you could get that info.

2) If this do not occur, you should try to start thinking in having a problem, perhaps in your reset logic (external to the FPGA) or perhaps in the FPGA logic.

Are you using any evaluation IP? Sometimes these cores stalls after a time running. They have a counter hidden in the logic.
 

Vonn

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Re: XC18V02VQ44C Problem

I need to check the connections between Spartan and the flash
The attached file is the connection schematic
1- Is this connections OK ?
2- Does the resistor value (4.7K) for the one pulled up to the done signal is a correct value ?
 

zape

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XC18V02VQ44C Problem

Why do you connect Program input to CFn? How did you configure the FPGA Mode pins?
 

Vonn

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Re: XC18V02VQ44C Problem

Iam working in Master serial mode and the Mode pins M0,M1,M2 are connected to GND
 

zape

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XC18V02VQ44C Problem

Your connection diagram seems to be ok. Did you check Done signal state?
 

speedoak

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Re: XC18V02VQ44C Problem

Vonn said:
Is it possible to FPGA to request reloading bit stream from the flash under any condition ? If yes , how can i control it ?

you can do it without any problem, just pulse PRGM signal
 

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