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When do we consider STA during FPGA design?

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eeeraghu

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I am into FPGA, Can u please say where the STA comes into the picture while implementing the design on FPGA, and what all the things i have to check for STA

Thanking you
Raghu
 

Shantha Rangarajan

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Re: Where does STA comes

STA comes into picture when you you to analyze the timing delays, wire load models, see the net delays, faults, see if there is Set up/ Hold violation etc.

Shantha iyer
 

sr66

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Re: Where does STA comes

STA comes after you have done logic synthesis and also after place&route.
You can use STA when you have a gate-level netlist.
Use STA to check for setup, hold and pulse width. Basically use it to check if your design meets its timing constraints.
 

eeeraghu

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Re: Where does STA comes

STA can be done immedietly either after mapping or place and route,

Thanx for the help
 

bismillah

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Re: Where does STA comes

hi,
Can somebody post any reading material / books / links on this topic, thanks
 

yaseen1

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Re: Where does STA comes

In FPGA STA comes on FPGA SYnthesis
 

yaseen1

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Re: Where does STA comes

STA Comes during Synthesi
 

yaseen1

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Re: Where does STA comes

sta comes during simulation
 

askrkrao

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Re: Where does STA comes

STA Comes during Synthesis [/i]
 

love2read

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Where does STA comes

STA check timing violations
 

nav_vlsi

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Re: Where does STA comes

STA COMES INTO PICTURE TWICE. ONCE DURING SYNTHESIS AND AGAIN DURING PLACE AND ROUTE.

SINCE SYNTHESIS TOOLS ARE THIRD PARTY TOOLS THEY DO NOT GIVE PRECISE DELAYS AND THE DELAYS ARE BASED ON WIRE-LOAD MODELS WHICH ARE APPROXIMATE.

P&R TOOLS ARE SILICON VENDOR TOOLS AND HENCE PROVIDE BETTER INFORMATION REGARDING THESE DELAYS.


regards
navien
 

Hards

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Where does STA comes

STA comes after place and route and during synthesis, it analys your circuit it there is any setup time or hold time violation.
 

foster_cn

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Where does STA comes

what is the STA tool for FPGA, like PT for ASIC?
 

satya_422

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Re: Where does STA comes

In FPGA Afetr Place and Rout Automatically Uses the STA tool to calculate the all timing issues and it gices all reports
 

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