What's your DFT architecture in SOC design?

[richardhuang]

the following is my DFT architecture, i have some dout about some of them:
(1) using the JTAG interface to start the MBIST,LBIST and the scan, the results of the BIST is mapped out by pads mapping.can we use the JTAG to shift the BIST resutl?
(2) for increasing the coverage for JTAG, what method do i use?
can anybody give your suggestion according to your experince?

 

[stocking]

you may use JTAG to start MBIST, and shift out MBIST result.
You can insert some SDFT which dont be used in scan mode into scan chain.

Added after 2 minutes:

you may use JTAG to start MBIST, and shift out MBIST result.
You can insert some SDFT which dont be used in scan mode into scan chain.

 

[richardhuang]

if i want to at-speed mbist testing, can i shift the MBIST result?basiclly the tck is slow than the function clock, and some time the fail signal is a pulse, how does the tck to capture the fail pulse of the MBIST?

 

[dft_guy]

The MBIST result is not scanned out at-speed, so there is no worry there. If you're using JTAG to launch scan, the status signals are sent to the TAP controller asynchronously - no particular timing requirements. Then, normally, the results are scanned out at TCK speed.

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