what's wrong with my ΔΣ-ADC

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dear all,
i have designed two stage ΔΣ ADC for DC voltage measure. input Voltage is about 0.075v, Vref=0.15, sampling freq=125k, i got 16384 data for FFT analysis. but there are two unwanted peak in the spectrum. please help me to check.
by the way, the left high freq peak is 3702 and the left is 12680
Thanks all
 

Did you think of DC offset voltage, idle tone problem in your design?
 

hi
if you are applying a dc signal then the output waveform shud be the same throughtout. If there are mutliple stages, check if they are properly synchronized. even dc offset can cause this problem.

regards
 

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