It was understood that large metal trace leading to the gate results in Antenna effect which results in oxide breakdown. What is the rule of thumb in selecting the metal width to the poly gate?. It was also highlighted that metal jump helps to overcome this problem, How does this work?. Thank You
This is a problem that occurs during IC fabrication.
If you cut the metal close to the gate, you will not have the big metal connected to it until you go at end of IC processes.
Another large used technique is putting diodes to each node (connected to bulk) to avoid this effect.
I hope it can help.
Mazz
Hi Mazz,
here is venkanna ,i am working as Backend design engg.i need some books on ASIC please send me the website or author name please.
thanking you
regards
venkanna.m
somebody use NAC diode as a protection against the antenna effect. what's the structure of NAC diode. does anybody have some references about that?
Thanks and best regards!
NAC is a Net Area Check Diode. It is connected often to the large metal area to the substrate in reverse bias condition with anode conneted to the Substrate. It breksdown to conduct below the gate oxide breakdown when the voltage gets to sufficiently high on the metal.
Hi Hrk hri,
actually when u use jumpers let a metal2 is used as jumper between matal1 and poly so that charged could collected on metal1 and poly interface will be reduced by using metal2 jumpers during etching process and due to this less charges on metal 1 ( when u used matal2 jumpers) there is less chances of antenna effects.
hope this helps.
regrds
manissri
The basic thumb rule to reduce the antenna affect is that the ratio of poly gate material to the connected metal should be less than a constnt(this is provided by the fab)
i,e ( Gate area / Metal area connected to gate) < constant(provided by fab)