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ARM operates only in pipeline mode (3 or 5 pipes).
Any instruction can be divided into different cycles which determine the pipe length.
For 3 stages pipe (fetch- decode - execute):
During fetch memory is accesed for instruction.
During decode control logic makes control for the execute cycle.
During execute dataflow path is occupied.
Without pipelining each instruction will pass by the 3 phases & needs three cycles to execute.
The 3 phases are in most cases unintersecting so while decoding the current instruction a new instruction can be fetched.
It will appear as if the process is executing an instruction in one cycle only due to the usage of pipelining. Thus appears faster.
ARM7 has a 3-stage pipeline.
ARM9 has a 5-stage pipeline.
ARM10 has 6 and ARM11 has 8, both with branch prediction to avoid pipeline stall due to branching.
A simple 3-stage pipeline consists of fetch, decode and execute.
fetch - to fetch the instruction from the code memory indicated by the program counter.
decode - interpret the opcode from the instruction.
execute - based on the opcode, perform required operation on the operand(s).
How a 3-stage pipeline works?
Time Fetch Decode Execute
time 0: Fetch 1 - -
time 1: Fetch 2 Decode 1 -
time 2: Fetch 3 Decode 2 Execute 1
time 3: Fetch 4 Decode 3 Execute 2
Pipelining - an efficient technique to complete an average of one instruction per cycle.
Notice I used the word "average".
Pipeline is not efficient when working with branch.