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What's the main difference between FPGA &CPLD ???

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Jun 27, 2002
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What's the main difference between FPGA & CPLD ???


There are three big difference:

1. the internal archi.. the fpga use lookuptables that are 4x1 mem cells,
and the most new cpld cells have one ff+aditional logic array of and+or gates.
Some kind of special fpga have also some special blocks for implement
of system on chip(soc) that usefull for build uc/up/dsp inside.

2. Most fpga based on ram cells so evry time you power up you need
boot them from mem or aditional uc/uc/dsp, also you can cange it desing
in system work(careful).
the cpld based in otp fuse or flash fuse so you don't need boot them.

3. the most of the cpld are not big like the fgpa
most cpld are in range of 1k-50k(~100k) gates equvalent
fpga today you can find in range over some milion gates equvalent

cpld are more popular is small design for glue logic some state mechine
and some fast app, etc..

fpga are more popular in big design when is need of mem and machine
that need a lot of ff,also in system on chips(for reduce space or
for develop design before asic productions).

Best regards. 8)
Hi, but what is this "ff"? :?:

Have you been using FPGA or CPLD?

CPLDs contains many logic units (gates) and few flip-flops.
FPGAs contains many flip-flops and few logic units (gates).

CPLDs only have to programmed once (nonvolatile).

FPGAs need an external memory with program since it have to be programmed at every power-up (volatile).

cpld's are generally faster
cpld's are good for simple algorithms such as gleu logic.
FPGA's are better for complex algorithms.
small FPGA's are generally cheaper than complex cpld's.

CPLD's are implmented in the way like PAL's but FPGA's are implemented in a gate array approach. u need PALSM and environments like taht to program CPLD's and u use max+2 environment and VHDL and Verilog HDL to program FPGA's. also about the internal structure u can get more on this pdf.

I have some points regarding the differences:
1.CPLDs as such have no specific architecture. They are just an array of PLDs in order increase the gate complexity resources. Even complex designs cannot be run on CPLDs as the number of cells provided is very less.
2. In contrast, FPGAs have the 2-dimenstional architecture in which each CLB will have 2-SLICEs. Main features are :
1. HIgher frequency of operation
2. Very Huge available memory blocks
3. In Built Multipliers for floating point arithmetic
4. DLLs for clock multiplication and division
HOpe this helps.
- satya

I think the gate counters are the most different point.

I heard that, now days there are ROM based FPGA. Pls anybody can put light on that.

They are basically differs in architecture. Logic cells and their size are vary.
CPLD has very low speed where as the FPGA has MUX and high speed design.

CPLD has ROM based and FPGA has RAM based.

FPGA has more logic cells

how do you see if the CPLD is OTP (one time Programble) or not in the datasheet on CPLD ? :) or CPLD allways OTP?

CPLD's can be reprogrammed , they have an internal non volatile memory that can be reprogrammed many times.

many thanks for the info, I was a little afraid that I had bought some OTP CPLD of this type : XILINX - XC2C64A-7VQG44C - CPLD, COOLRUNNER-II, 64MCELL, 44VQFP

The Coolrunner II family datasheet **broken link removed**
in page 14 has a minimum program/erase cycle life of 1000 times.

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